Semiconductor Device Soft Recovery Characteristics
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Solution Overview
Problem
Semiconductor devices with parasitic diodes exhibit hard recovery characteristics, leading to noise and malfunction due to abrupt reverse current changes when turned off, affecting their performance in applications like inverter circuits driving inductive loads.
Innovation Solution
A semiconductor device design featuring a pn junction between p-type and n-type regions, where the second electrode is connected to the first electrode, allowing the depletion layer to extend gradually, facilitating soft recovery characteristics by reducing the density of holes in the n-type region, thereby slowing the return of reverse current to zero.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a parasitic diode is turned off abruptly, then the reverse current returns to zero quickly (hard recovery characteristics), but this causes noise and malfunction
Solution Approach 1:
The gate electrode applies a preliminary negative voltage to the channel region before the parasitic diode is fully turned off. This preliminary action creates a depletion layer that extends into the n-type drift layer in advance, preparing the structure to gradually sweep out carriers rather than allowing abrupt current termination, thereby reducing noise while maintaining switching speed
2Loss of time
If the depletion layer extends quickly when the parasitic diode is turned off, then the reverse current changes abruptly, but this generates recovery noise
Solution Approach 1:
The invention dynamically controls the depletion layer extension through a time-varying voltage applied by the gate electrode. The voltage transitions from positive to negative in a controlled manner, creating a dynamic depletion region that gradually sweeps carriers out of the drift layer. This dynamic control allows the reverse current to decrease smoothly over time rather than abruptly, reducing recovery noise while achieving fast reverse recovery
3Productivity
If carriers are rapidly swept out of the drift layer when the parasitic diode turns off, then the reverse current returns to zero quickly, but this causes abrupt current changes and noise
Solution Approach 1:
The gate electrode provides feedback control by sensing the need to turn off the parasitic diode and applying a negative voltage in response. This feedback mechanism controls the rate at which carriers are swept out of the drift layer, balancing the need for fast switching with the need to avoid abrupt current changes. The feedback ensures that the depletion layer extends at an optimal rate that maintains high switching speed while minimizing noise generation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves soft recovery characteristics, reducing noise and improving the reverse recovery characteristics of parasitic diodes, while maintaining low ON resistance and minimizing the influence of increased reverse current.
Implementation Method 1
a parasitic diode is formed in a semiconductor layer by the pn junction between the second region and the third region
Implementation Method 2
This facilitates a depletion layer to extend in the first surface of the semiconductor layer and it is made possible to advance the timing at which the depletion layer extends
Implementation Method 3
carriers (holes) in a p type body region move to the source electrode side, and carriers (electrons) in an n− type drift layer move to the drain electrode side
Data Source
AI summary
A semiconductor device includes a semiconductor layer having a first surface and a second surface, a first region of a first conductivity type formed on the first surface side of the semiconductor layer, a second region of a second conductivity type in contact with the first region, a third region of the first conductivity type that is in contact with the second region and exposed from the first surface side of the semiconductor layer, a gate electrode facing the second region through a gate insulating film, a first electrode that is physically separated from the gate electrode and faces the second region and the third region through an insulating film, a second electrode formed on the semiconductor layer and electrically connected to the first region, the second region, and the first electrode, and a third electrode electrically connected to the third region.


