Semiconductor Package Solder Resist Anchoring

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Solution Overview

Problem

Conventional flip chip packages experience underfill delamination due to shear or peeling stress, leading to failure modes like cracks and delamination, especially under temperature cycling conditions, caused by coefficient of thermal expansion mismatch between organic underfills and inorganic conductive traces.

Innovation Solution

A semiconductor package design featuring a solder resist layer with extending portions that cover the conductive traces, having a wider width than the traces themselves, with vertical sidewalls, which helps anchor the molding compound and prevents underfill delamination by creating a T-shaped cross section, allowing the molding compound to fill the gap between the substrate and the semiconductor die without interfering with its formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If underfill is used to protect conductive bumps, then stress to conductive bumps is reduced, but underfill delamination occurs due to shear or peeling stress

Engineering Contradiction:
Improveprotection of conductive bumpsVSAvoidunderfill delamination
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The solder resist layer acts as an intermediary element between the underfill and the conductive trace. It provides a transition zone that reduces the stress concentration at the underfill-conductive trace interface, thereby preventing delamination while maintaining the protective function of the underfill.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solder resist layer is formed in advance before underfill application. Its extending portion that covers part of the conductive trace is prepared beforehand to create a stress-distributing structure that prevents future delamination issues.

Inventive Principle:
Principle #10Preliminary action

2Strength

If solder resist layer extends wider than conductive trace, then anchoring of molding compound is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveanchoring of molding compoundVSAvoidsolder resist layer structure
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The solder resist layer is designed with local quality variation - it has a wider extending portion that covers part of the conductive trace to provide anchoring, while maintaining a narrower width in other areas. This localized extension provides the necessary mechanical anchoring without requiring complex structures throughout the entire device.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces underfill delamination and stress concentration, enhancing the mechanical strength and reliability of the semiconductor package by ensuring proper anchoring and filling of the molding compound, thereby improving thermal expansion mismatch issues.

Implementation Method 1

A solder resist layer is disposed on the substrate, having an extending portion covering a portion of the first conductive trace, wherein a width of the extending portion of the solder resist layer is larger than that of the portion of the first conductive trace

Methodology Applied
Scientific EffectMechanical anchoring: Mechanical Fastener

Implementation Method 2

the extending portion of the solder resist layer has a vertical sidewall extruding over to an adjacent vertical sidewall of the portion of the first conductive trace

Methodology Applied
Scientific EffectStress distribution:

Data Source

PatentUS9659893B2Semiconductor package
Publication Date: 2017.05.23 MEDIATEK INC
  • US9659893B2 patent drawing
  • US9659893B2 patent drawing
  • US9659893B2 patent drawing

AI summary

The invention provides a semiconductor package. The semiconductor package includes a substrate. A first conductive trace is disposed on the substrate. A first conductive trace disposed on the substrate. A semiconductor die is disposed over the first conductive trace. A solder resist layer that extends across an edge of the semiconductor die is also included. Finally, a molding compound is provided that is formed over the substrate and covers the first conductive trace and the semiconductor die.