Semiconductor Device Solder Resist Aperture Design

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The miniaturization of semiconductor devices and the increase in signal terminal density lead to challenges in the reliability of bonding between solder-including electrodes and wirings, particularly due to the reduction in solder bump diameter, which can result in mechanical stress and peeling issues, and existing flip chip techniques face difficulties in adapting to finer pitches and higher densities.

Innovation Solution

A semiconductor device and manufacturing method that utilize a continuous solder resist layer with apertures on conductive layers, allowing for redundant electrode connections and enhanced mechanical strength, where the apertures are designed to accommodate thermal expansion and reduce the risk of short circuits by adjusting their shape and size to match the thermal expansion coefficient of the packaging substrate, ensuring reliable bonding even under mechanical stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the solder bump diameter is reduced to increase terminal density, then the number of connection terminals increases, but the bonding strength and reliability between solder-including electrodes and wirings deteriorate

Engineering Contradiction:
Improvenumber of connection terminalsVSAvoidbonding strength
Core Design Contradiction:
Quantity of substanceVSStrength

Solution Approach 1:

The patent applies nesting by placing the solder-including electrode inside the aperture of the solder resist layer, and further nesting the wiring structure within the bonding interface. This nested configuration allows the smaller diameter electrode to be securely held and bonded to the wiring, compensating for the reduced bonding area caused by miniaturization and maintaining bonding strength despite reduced solder bump diameter.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent transitions from a simple surface-level bonding interface to a multi-dimensional structure by introducing the aperture-based confinement in the vertical dimension. The solder resist layer with apertures creates a three-dimensional bonding environment that enhances mechanical interlocking and distributes stress more effectively, compensating for the reduced electrode diameter.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If the solder bump diameter is reduced to increase terminal density, then the number of connection terminals increases, but the reliability under mechanical stress deteriorates

Engineering Contradiction:
Improvenumber of connection terminalsVSAvoidreliability under mechanical stress
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies beforehand cushioning by introducing the solder resist layer with apertures that surround and protect the solder-including electrodes before mechanical stress is applied. This protective structure cushions the electrodes against mechanical stress, preventing peeling and enhancing reliability under stress conditions despite the reduced electrode diameter.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The solder resist layer acts as a flexible thin film structure that conforms to the electrode geometry and provides mechanical protection. This thin film with apertures creates a flexible protective environment around the electrode, allowing stress distribution and preventing catastrophic failure under mechanical load.

Inventive Principle:
Principle #30Flexible shells and thin films

3Quantity of substance

If the aperture size is reduced to match fine pitch electrodes, then the terminal density increases, but the risk of short circuits increases

Engineering Contradiction:
Improveterminal densityVSAvoidrisk of short circuits
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by making the solder resist layer properties location-dependent: the apertures are locally positioned to match each electrode, providing open access for bonding, while the surrounding solder resist material locally provides insulation. This local differentiation of properties (open aperture vs. insulating material) enables fine pitch spacing without increasing short circuit risk.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The solder resist layer acts as an intermediary substance between adjacent electrodes and wirings. Even when aperture spacing is reduced for fine pitch, the solder resist material surrounding each aperture provides electrical insulation, preventing short circuits while allowing the apertures themselves to be closely spaced for high terminal density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances the reliability and mechanical strength of the bonding between solder-including electrodes and wirings by providing redundant connections and optimizing the aperture design to accommodate thermal expansion, thereby improving the yield and reliability of flip chip semiconductor devices.

Implementation Method 1

By a batch reflow method, the solder may melt to form connection

Methodology Applied
Scientific EffectMelting: Melting

Implementation Method 2

connecting the semiconductor chip to the packaging substrate with use of solder bumps

Methodology Applied
Scientific EffectBonding: Welding

Data Source

PatentUS10720402B2Semiconductor device and method of manufacturing the same
Publication Date: 2020.07.21 SONY GROUP CORP
  • US10720402B2 patent drawing
  • US10720402B2 patent drawing
  • US10720402B2 patent drawing

AI summary

A semiconductor chip includes a chip body and a plurality of solder-including electrodes provided on an element-formation surface of the chip body. A packaging substrate includes a substrate body, and one or more conductive layers and a solder resist layer that are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the one or more conductive layers, and has one or more apertures on each of the one or more conductive layers. The plurality of solder-including electrodes include two or more first electrodes having a same function other than a function of power supply. The one or more conductive layers include a continuous first conductive layer. The two or more first electrodes are connected to the continuous first conductive layer. The one or more apertures are confronted with the respective two or more first electrodes.