Semiconductor Source/Drain Epitaxial Growth via Dual-Stage Bake
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The scaling down of semiconductor devices poses challenges in the epitaxial growth of source/drain regions due to increased aspect ratios, leading to 'less defect' issues, where the growth is insufficient, affecting product yield, and requiring an effective pre-clean process to ensure proper function.
Innovation Solution
A method involving a bake process with varying air pressures and RPM stages to remove impurities from trenches, followed by epitaxial growth, where the first stage has a higher pressure and RPM for reaction and the second stage has a lower pressure for product removal, facilitating efficient epitaxial growth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the aspect ratio is increased to enable scaling down of semiconductor devices, then device density is improved, but the epitaxial growth of source/drain regions becomes insufficient leading to less defect issues
Solution Approach 1:
The patent applies preliminary action by performing a pre-bake process before the main epitaxial growth to modify the trench surface conditions. The pre-bake process removes organic contaminants and prepares the silicon surface, ensuring that the subsequent epitaxial growth can proceed effectively even in high aspect ratio trenches. This preliminary surface preparation resolves the contradiction by enabling proper epitaxial growth in the challenging geometry created by scaling.
Solution Approach 2:
The patent employs parameter changes by varying temperature, pressure, and gas composition during different stages of the epitaxial process. The pre-bake stage uses specific temperature and atmosphere conditions to clean the surface, while the growth stage uses different parameters to control silicon deposition. These parameter adjustments allow the process to accommodate high aspect ratio trenches and prevent less defect issues while maintaining device density.
2Manufacturing precision
If a pre-clean process is performed to remove impurities from trenches, then epitaxial growth quality is improved, but process complexity increases
Solution Approach 1:
The patent merges the pre-clean and epitaxial growth processes into a single continuous operation performed in one chamber. The pre-bake process and the subsequent epitaxial growth are sequentially integrated without breaking vacuum or transferring the substrate between chambers. This consolidation improves epitaxial growth quality by ensuring clean surfaces while avoiding the complexity of separate process steps and additional chamber transfers.
Solution Approach 2:
The epitaxial chamber is designed to perform multiple functions: it can conduct both the pre-bake cleaning process and the epitaxial growth process. By making the chamber universal, the patent eliminates the need for separate dedicated cleaning chambers, thereby improving growth quality through effective pre-cleaning while reducing overall process complexity and equipment requirements.
3Productivity
If the aspect ratio is increased for scaling down, then device density is improved, but source/drain pattern size becomes smaller than intended
Solution Approach 1:
The patent uses parameter changes during epitaxial growth, specifically controlling temperature, pressure, and gas flow rates, to ensure adequate silicon deposition in high aspect ratio trenches. By adjusting these parameters, the process compensates for the geometric challenges of scaled-down devices, ensuring that source/drain patterns achieve their intended dimensions even when device density is increased through higher aspect ratios.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the efficiency of epitaxial growth, reducing 'less defect' issues and improving the overall performance of semiconductor devices by effectively removing impurities and ensuring proper source/drain formation.
Implementation Method 1
performing a bake process of removing an impurity from the trench
Implementation Method 2
cleaning the trench by removing contamination from the trench by a chemical reaction between the contamination and another reactant
Implementation Method 3
forming a source/drain in the trench by an epitaxial growth
Data Source
AI summary
A method of fabricating a semiconductor device is provided. The method includes forming a dummy gate electrode on a substrate, forming a trench on a side surface of the dummy gate electrode, performing a bake process of removing an impurity from the trench and forming a source/drain in the trench, wherein the bake process comprises a first stage and a second stage following the first stage, an air pressure in which the substrate is disposed during the first stage is different from an air pressure in which the substrate is disposed during the second stage, and the bake process is performed while the substrate is on a stage rotating the substrate, wherein a revolution per minute (RPM) of the substrate during the first stage is different from a revolution per minute (RPM) of the substrate during the second stage.