Semiconductor Source Drain Structures Using Segmented Arsenic Phosphorous Doping

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Solution Overview

Problem

In small-scale metal-oxide-semiconductor (MOS) devices, achieving high doping concentrations in source and drain regions while controlling implantation depth is challenging, leading to defects like piping that can cause shorting and increased leakage currents due to the use of heavy arsenic impurities.

Innovation Solution

The semiconductor structure incorporates a combination of arsenic and phosphorous doping, where the deep source/drain regions use phosphorous with a greater junction depth and concentration than arsenic, reducing silicide piping and leakage currents by minimizing lattice damage from phosphorous implantation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If arsenic is heavily doped into source and drain regions to achieve high doping concentration, then sheet resistance is reduced, but piping defects are introduced that can cause shorting and increased leakage currents

Engineering Contradiction:
Improvedevice reliabilityVSAvoidpiping defects
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The source and drain regions are segmented into two distinct zones: an LDD region containing arsenic and a deep source/drain region containing phosphorous. This segmentation allows each region to serve different functions - the LDD region provides high doping concentration for low sheet resistance, while the deep source/drain region provides adequate doping without causing piping defects that would compromise device reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different dopant materials are used in different local regions of the source and drain structures. Arsenic is used in the LDD region where high doping concentration is needed, while phosphorous is used in the deep source/drain region where adequate doping is sufficient but piping defects must be avoided. This local differentiation of material properties optimizes both electrical performance and device reliability.

Inventive Principle:
Principle #3Local quality

2Reliability

If arsenic implantation is used to achieve high doping concentration, then sheet resistance is reduced, but lattice damage increases due to the heavy atomic weight of arsenic

Engineering Contradiction:
Improvedevice reliabilityVSAvoidlattice damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The source and drain regions are segmented into two distinct zones: an LDD region containing arsenic and a deep source/drain region containing phosphorous. This segmentation allows each region to serve different functions - the LDD region provides high doping concentration for low sheet resistance, while the deep source/drain region provides adequate doping without causing piping defects that would compromise device reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different dopant materials are used in different local regions of the source and drain structures. Arsenic is used in the LDD region where high doping concentration is needed, while phosphorous is used in the deep source/drain region where adequate doping is sufficient but piping defects must be avoided. This local differentiation of material properties optimizes both electrical performance and device reliability.

Inventive Principle:
Principle #3Local quality

3Length of moving object

If shallow junctions are formed in small-scale MOS devices, then device scaling is achieved, but controlling implantation depth while maintaining high doping concentration becomes difficult

Engineering Contradiction:
Improvejunction depthVSAvoidimplantation depth control
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The source and drain regions are segmented into two distinct zones: an LDD region containing arsenic and a deep source/drain region containing phosphorous. This segmentation allows each region to serve different functions - the LDD region provides high doping concentration for low sheet resistance, while the deep source/drain region provides adequate doping without causing piping defects that would compromise device reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the dopant material parameter from using only arsenic to using a combination of arsenic and phosphorous. By selecting phosphorous for the deep source/drain region, the implantation process achieves adequate doping concentration with better depth control and reduced lattice damage, overcoming the limitations of using arsenic alone in scaled devices.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces silicide piping and leakage currents, enhancing the reliability of MOS devices by optimizing dopant profiles and maintaining high doping concentrations without significant short channel effects.

Implementation Method 1

The implantation of arsenic thus introduces greater degree of defects

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

Arsenic has relatively low diffusion length, and thus can be implanted to a high concentration without significantly affecting short channel characteristics and junction abruptness

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS7649226B2Source and drain structures and manufacturing methods
Publication Date: 2010.01.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US7649226B2 patent drawing
  • US7649226B2 patent drawing
  • US7649226B2 patent drawing

AI summary

A semiconductor structure includes a semiconductor substrate; a first gate dielectric on the semiconductor substrate; a first gate electrode over the first gate dielectric; a first lightly doped source or drain (LDD) region in the semiconductor substrate and adjacent the first gate dielectric, wherein the first LDD region comprises arsenic; and a first deep source/drain region in the semiconductor substrate and adjacent the first gate dielectric. The first deep source/drain region comprises phosphorous, and a first phosphorous junction depth in the first deep source/drain region is greater than about three times a first arsenic junction depth in the first deep source/drain region.