Semiconductor Source/Drain Width Control via Spacer Height
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Solution Overview
Problem
In semiconductor devices, particularly finFETs, the dense arrangement of active fins can lead to electrical shorts due to source/drain layers contacting each other, and existing manufacturing methods struggle to control the growth of these layers effectively, resulting in suboptimal electrical performance.
Innovation Solution
The semiconductor device incorporates spacers with varying heights on both sides of active regions, restricting the horizontal growth of source/drain layers on densely packed regions to prevent electrical shorts while allowing wider growth on more spaced-out regions, enhancing electrical performance by controlling the width and height of these layers through selective epitaxial growth processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If active fins are formed very densely to increase device capacity, then productivity and device integration are improved, but source/drain layers from neighboring active fins may grow to contact each other causing electrical shorts
Solution Approach 1:
The patent applies local quality by forming spacers with different heights at different locations. Specifically, first spacers are formed with a first height on first active regions, while second spacers are formed with a second height on second active regions. This local differentiation allows the source/drain layers to have different widths depending on their position, preventing electrical shorts in densely packed regions while maintaining optimal performance in other regions.
Solution Approach 2:
The patent implements preliminary action by forming the spacers before forming the source/drain layers. The spacers are prepared in advance with specific heights that will subsequently control the width of the source/drain layers during the epitaxial growth process. This preliminary structure preparation ensures that the source/drain layers grow to the desired dimensions and prevents electrical shorts before the actual layer formation occurs.
2Ease of manufacture
If uniform spacers are used for all active regions, then manufacturing complexity is reduced, but the ability to control source/drain layer width variation across different regions is limited
Solution Approach 1:
The patent achieves manufacturing precision through local quality by forming spacers with different heights at different locations. The first spacers have a first height and the second spacers have a second height, allowing precise control over source/drain layer widths in different regions. This approach prioritizes manufacturing precision over fabrication simplicity, as the additional process steps required to create varied spacer heights enable superior control over the final device characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents electrical shorts between source/drain layers on densely packed active fins while enabling enhanced electrical performance on more spaced-out regions by controlling the width and height of the source/drain layers, improving the overall performance of the semiconductor device.
Implementation Method 1
silicon-germanium layers or silicon carbide layers serving as source/drain layers may be formed to fill the recesses by a selective epitaxial growth (SEG) process
Data Source
AI summary
A semiconductor device includes: a substrate including a plurality of first active regions and a plurality of second active regions; a plurality of first gate structures formed above the first active regions, respectively, and a plurality of second gate structures formed above the second active regions, respectively; and a plurality of first source/drain layers corresponding to the first gate structures, respectively, and a plurality of second source/drain layers corresponding to the second gate structures, respectively, wherein a width of each of the first source/drain layers is smaller than a width of each of the second source/drain layers.