Semiconductor Source Line Segmentation for Voltage Stability
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Solution Overview
Problem
The source line bouncing phenomenon in three-dimensional semiconductor memory devices causes voltage fluctuations, leading to device malfunction due to excessive current flow when multiple memory cell strings are activated simultaneously.
Innovation Solution
A semiconductor device with a cell structure, source coupling structure, and source discharge transistor is designed, featuring alternately stacked conductive patterns and interlayer insulating layers, along with a vertical stack mesh structure that includes additional current paths to reduce interconnect resistance and mitigate voltage fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a common source line is coupled to large numbers of memory cell strings, then integration density is improved, but source line bouncing phenomenon occurs causing voltage fluctuations
Solution Approach 1:
The source line is divided into multiple separate source lines instead of using a single common source line. Each source line is coupled to a specific group of memory cell strings, segmenting the current paths. This segmentation prevents excessive current accumulation on a single source line, thereby mitigating the source line bouncing phenomenon while maintaining high integration density through the multi-line architecture.
2Speed
If multiple memory cell strings are activated at the same time, then current flow increases improving speed, but source line bouncing causes malfunction
Solution Approach 1:
Memory cell strings are grouped and assigned to different source lines. When multiple memory cell strings are activated simultaneously, the current is distributed across multiple segmented source lines rather than concentrating on a single common source line. This segmentation allows high-speed parallel activation while preventing voltage fluctuations that would cause malfunction.
Solution Approach 2:
Additional current paths are introduced as intermediary conductive structures between the source pick-up line and the source discharge transistor. These intermediary paths provide alternative current flow routes that reduce the burden on the common source line, enabling fast activation of multiple cell strings while maintaining voltage stability through the distributed current distribution.
3Reliability
If additional current paths are added to reduce interconnect resistance, then voltage stability is improved, but device complexity increases
Solution Approach 1:
The additional current paths are merged with the existing source line architecture by forming conductive patterns within the interlayer insulating layers. These paths are integrated into the manufacturing process using standard conductive layer formation techniques, combining the voltage stability benefit with the existing device structure rather than adding completely separate complex interconnection systems.
Data Source
AI summary
A semiconductor device in accordance with an embodiment may include a cell structure, a source coupling structure, and a source discharge transistor. The cell structure may include alternately stacked first conductive patterns and first interlayer insulating layers enclosing a channel layer. The source coupling structure separated from the cell structure may include alternately stacked second conductive patterns and second interlayer insulating layers. The source discharge transistor may be coupled to the source coupling structure.