Semiconductor Source/Drain Reshaping for FinFET Integration
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Solution Overview
Problem
As semiconductor devices continue to shrink in feature size, challenges arise in integrating more components into a given area while maintaining performance, particularly in forming efficient source/drain regions for finFET devices, which require precise epitaxial growth and shaping processes to reduce resistance and prevent bridging.
Innovation Solution
The process involves forming epitaxially grown source/drain regions on fins within a semiconductor substrate, followed by selective etching to reshape these regions, creating a box-shaped structure with vertical sidewalls to increase size and reduce resistance, and using isolation structures of varying depths to enhance tuning and variability in isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but manufacturing precision and reliability deteriorate due to additional problems arising from smaller dimensions
Solution Approach 1:
The patent performs preliminary shaping of source/drain regions through selective epitaxial growth before final device formation. By pre-forming the regions with appropriate geometry (overlapping the fin pitch) and then selectively removing material, the process establishes a foundation that enables subsequent precise patterning at reduced feature sizes, thereby maintaining manufacturing precision while achieving higher integration density
Solution Approach 2:
The patent divides the source/drain region formation into multiple discrete steps: selective epitaxial growth to create initial regions, selective removal of portions of these regions, and subsequent device formation. This segmentation allows each step to be optimized independently, maintaining precision even as overall feature sizes are reduced to increase integration density
2Reliability
If source/drain regions are enlarged to reduce channel and parasitic resistance, then device performance improves, but area occupied increases reducing integration density
Solution Approach 1:
The patent creates source/drain regions with non-uniform geometry where specific portions are removed to optimize local electrical properties. By selectively removing material from certain areas while maintaining other regions, the process reduces parasitic resistance in critical locations without uniformly enlarging the overall region area, thus improving device performance while limiting area increase
Solution Approach 2:
The patent utilizes vertical dimension control through selective epitaxial growth to create source/drain regions that extend in the vertical direction rather than uniformly expanding horizontally. This dimensional approach allows resistance reduction through increased conductive path volume without proportionally increasing the planar area footprint, enabling performance improvement with minimal area penalty
3Reliability
If selective epitaxial growth and shaping processes are used to form source/drain regions, then resistance is reduced and device performance improves, but process complexity increases
Solution Approach 1:
The patent employs selective epitaxial growth where the material growth process automatically occurs only in desired locations based on crystallographic orientation and catalyst presence, without requiring continuous external intervention. This self-directed growth mechanism simplifies the overall process complexity while achieving the desired source/drain region formation and resistance reduction
Solution Approach 2:
The patent controls source/drain region formation by adjusting epitaxial growth parameters such as temperature, pressure, and precursor flow rates. By optimizing these parameters, the process achieves precise control over region geometry and electrical properties in a single integrated step, reducing the need for multiple separate processing steps and thereby lowering overall process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for larger sized source/drain regions, reducing channel and parasitic resistance, thereby enhancing device performance and integration density while preventing bridging and improving isolation between components.
Implementation Method 1
A source/drain region is selectively grown on the fin
Implementation Method 2
The source/drain region is reshaped after the selectively growing the source/drain region
Data Source
AI summary
A process for manufacturing a semiconductor device and the resulting structure are presented. In an embodiment a source/drain region is grown. Once grown, the source/drain region is reshaped in order to remove facets. The reshaping may be performed using an etching process whereby a lateral etch rate of the source/drain region is larger than a vertical etch rate of the source/drain region.