Semiconductor Pattern Formation Using Spacer Etching
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Solution Overview
Problem
Semiconductor devices require forming patterns with different topographic feature widths on the same level, which is challenging due to the resolution limits of photolithography, especially for fine patterns that cannot be formed using conventional methods.
Innovation Solution
A method involving the formation of narrow and wide topographic features on a semiconductor substrate, using spacers and etching processes to create trenches of varying widths, along with the simultaneous formation of an alignment or overlay key, allowing for the creation of patterns outside the resolution limits of photolithography.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography is used to form patterns, then large-scale integration patterns can be formed, but patterns with features finer than the resolution limit cannot be formed
Solution Approach 1:
The pattern formation process is divided into multiple steps: first forming a mold mask pattern with features at the photolithography resolution limit, then forming spacers on the side walls of these features, and finally using the spacers as new masks to define the final fine patterns. This segmentation allows achieving feature widths below the original photolithography resolution limit.
Solution Approach 2:
The invention transitions from planar pattern formation to three-dimensional structure formation by creating spacers on the vertical side walls of the mold mask features. This dimensional transition enables the definition of finer horizontal features through the vertical spacer thickness, effectively bypassing the photolithography resolution limit.
2Adaptability or versatility
If photolithography is used for pattern formation, then patterns within resolution limits can be formed, but patterns with different feature widths on the same level cannot be simultaneously formed
Solution Approach 1:
The invention applies different pattern formation approaches to different regions of the substrate. In the first area, spacers are formed on narrow topographic features to create fine patterns, while in the second area, direct photolithography is used for wide features. This local differentiation allows simultaneous formation of patterns with different feature widths on the same level.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the simultaneous formation of patterns with different feature widths on the same level, enhancing the fabrication of semiconductor devices by overcoming the limitations of photolithography, particularly in memory cell and peripheral circuit regions.
Implementation Method 1
the transcription process may be an etching process in which the hard mask layer is etched using the first spacers and the low density mask pattern as an etch mask
Data Source
AI summary
A method in the fabrication of a semiconductor device simultaneously forms different patterns on the same level of the device. The device has a first area and a second area. A low density mask pattern of at least one relatively wide topographic feature is formed on the second area, a plurality of relatively narrow topographic features is formed on the first area, first spacers are formed on side walls of the narrow topographic features in the first area, the relatively narrow topographic features are removed, and the patterns of the first spacers and the relatively wide topographic feature(s) are simultaneously transcribed in the first and second areas, respectively.