Semiconductor Spacer Structure for Dual-Sided Heat Dissipation

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Solution Overview

Problem

Existing semiconductor power modules face challenges in efficiently radiating heat from both upper and lower surfaces, which can lead to thermal management issues and reduced performance.

Innovation Solution

The semiconductor device incorporates a spacer with a larger upper surface area than its lower surface area, which acts as both a current path and a heat radiation path, effectively spreading heat across a larger area and improving thermal dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If heat is radiated from both upper and lower surfaces of the module, then thermal dissipation is improved, but device complexity increases

Engineering Contradiction:
Improveheat radiation performanceVSAvoidmodule structure complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The spacer is designed to perform multiple functions simultaneously: it provides mechanical support to maintain chip positioning, serves as a current conduction path for electrical connectivity, and acts as a heat radiation path due to its larger upper surface area. This multi-functionality resolves the contradiction by integrating heat radiation capability into an existing structural component rather than adding separate cooling mechanisms.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The spacer features an asymmetric cross-sectional area design where the upper surface area is intentionally made larger than the lower surface area. This asymmetry optimizes heat radiation from the upper surface while maintaining adequate electrical and thermal contact with the chip at the smaller lower surface, thereby improving heat dissipation without requiring symmetric expansion that would increase overall device complexity.

Inventive Principle:
Principle #4Asymmetry

2Temperature

If spacer cross-sectional area is increased for better heat radiation, then thermal dissipation is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveheat radiation areaVSAvoidjoint alignment precision
Core Design Contradiction:
TemperatureVSManufacturing precision

Solution Approach 1:

The spacer design implements local quality by concentrating the larger cross-sectional area specifically at the upper surface where heat radiation is most critical, while maintaining a smaller lower surface area for precise chip bonding. This localized optimization allows the heat radiation function to be enhanced without requiring the entire spacer structure to be manufactured with high precision, thereby resolving the contradiction between heat radiation area and manufacturing precision requirements.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances heat radiation performance by spreading heat across a larger area and aligns the thermal expansion coefficients of the spacer with the chips and substrates, preventing joint peeling due to thermal expansion differences.

Implementation Method 1

The spacer has a first portion in contact with the chip and a second portion in contact with the second substrate... acts as both a current path and a heat radiation path, effectively spreading heat across a larger area

Methodology Applied
Scientific EffectHeat conduction: Conduction (thermal)

Implementation Method 2

aligns the thermal expansion coefficients of the spacer with the chips and substrates, preventing joint peeling due to thermal expansion differences

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS20250038057A1Semiconductor device
Publication Date: 2025.01.30 KK TOSHIBA
  • US20250038057A1 patent drawing
  • US20250038057A1 patent drawing
  • US20250038057A1 patent drawing

AI summary

According to one embodiment, a semiconductor device includes a first substrate, a second substrate, a chip, and a spacer. The second substrate is provided to face the first substrate. The chip is provided on the first substrate and between the first substrate and the second substrate. The spacer is provided on the chip and couples the chip and the second substrate. The spacer has a first portion in contact with the chip and a second portion in contact with the second substrate. The second portion is larger in area than the first portion.