Semiconductor Active Region Patterning With Spacer-Defined Island Cuts

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Solution Overview

Problem

Existing semiconductor fabrication technologies face challenges in achieving uniformity and efficiency in forming active regions, particularly in DRAM devices, due to limitations in scaling down device size and maintaining consistent performance and manufacturing yield.

Innovation Solution

A method involving the formation of strip patterns, patterned mask layers, spacers, and conformal layers is employed to create island patterns and active regions, where the photomask patterns are optimized to ensure larger pitch and size ratios, allowing for self-aligned double patterning technology that results in uniform trench sizes and improved transistor performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional single patterning method is used to form active regions, then the fabrication process is simple, but the uniformity of trench sizes and transistor performance deteriorates

Engineering Contradiction:
Improveuniformity of trench sizesVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patterning process is segmented into two distinct steps: first forming strip patterns with a preliminary pitch, then using spacer deposition and selective removal to create the final island patterns with improved uniformity. This segmentation allows each step to be optimized independently, achieving better overall precision without excessive complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The strip patterns are formed in advance with a relaxed pitch that is easier to control, and the final precise patterns are derived through subsequent spacer formation and selective etching. This preliminary action enables better control over the final trench dimensions and uniformity

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If device size is scaled down to increase DRAM density, then the storage capacity improves, but the manufacturing yield and performance consistency deteriorate

Engineering Contradiction:
ImproveDRAM densityVSAvoidperformance consistency
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The invention introduces an additional dimensional control mechanism by forming spacers perpendicular to the original strip patterns. This adds a new degree of freedom for controlling pitch and size, enabling precise control of active region dimensions even at scaled-down sizes, thereby maintaining performance consistency while increasing density

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The method changes the critical parameters from direct photolithographic patterning to spacer thickness control and selective etching parameters. These parameter changes enable better control over final dimensions and uniformity, allowing density scaling without sacrificing reliability

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If pitch and size ratios are increased in photomask patterns, then the uniformity of formed structures improves, but the photomask design complexity increases

Engineering Contradiction:
Improveuniformity of active regionsVSAvoidphotomask design
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The photomask design is segmented into two separate masks: the first mask creates simple strip patterns with uniform pitch, and the second mask (or spacer-defined pattern) creates the final island patterns. This segmentation simplifies individual mask designs while achieving the desired uniformity through the combined process

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the uniformity of semiconductor memory device performance and manufacturing yield by ensuring consistent trench sizes and reducing short circuit issues between active regions, thereby improving DRAM device efficiency and yield.

Implementation Method 1

patterning the photoresist material using a photomask so that patterns of the photomask are transferred into the photoresist material

Methodology Applied
Scientific EffectPhotography: Photography

Implementation Method 2

forming a conformal layer to cover the spacers and partially fill the first openings and the trenches

Methodology Applied
Scientific EffectConformal deposition: Deposition (physical)

Data Source

PatentUS20230386843A1Method for forming semiconductor structure
Publication Date: 2023.11.30 WINBOND ELECTRONICS CORP
  • US20230386843A1 patent drawing
  • US20230386843A1 patent drawing
  • US20230386843A1 patent drawing

AI summary

A method for forming a semiconductor structure includes forming strip patterns over a semiconductor substrate, and forming a patterned mask layer over the strip patterns. The first openings are arranged in an array. A pitch of the first openings in the first direction is smaller than a pitch of the first openings in a second direction. A first dimension of the first openings in the first direction is longer than a second dimension of the first openings in the second direction. The method also includes forming spacers to partially fill the first openings, removing the patterned mask layer to form trenches between the spacers, forming a conformal layer to cover the spacers and partially fill the first openings and the trenches, and etching the strip patterns using the conformal layer and the spacers as a mask, thereby cutting the strip patterns into island patterns.