Semiconductor Pattern Width Control via Spacer Masks
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Solution Overview
Problem
The limitations of optical resolution in photolithography equipment hinder the formation of fine patterns in semiconductor devices, necessitating innovative methods to create patterns with varying widths in different regions of a semiconductor device.
Innovation Solution
A method involving the formation of sacrificial cores and spacers on a semiconductor structure, allowing for the use of these spacers as masks for etching, enabling the creation of active regions and gate patterns with different widths in distinct regions without removing the mandrel, thereby overcoming the resolution limitations of conventional photolithography.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography equipment is used to form patterns, then the manufacturing process is simple and efficient, but the optical resolution limitation prevents formation of fine patterns with varying widths
Solution Approach 1:
The substrate is divided into multiple regions (first region, second region, third region) with different pattern width requirements. Each region receives tailored processing: regions requiring fine patterns use spacer-based self-aligned etching, while other regions use conventional photolithography, allowing optimal precision for each segment without universal process complexity
Solution Approach 2:
Sacrificial cores are formed in advance before the final pattern definition step. These cores serve as templates for spacer formation, enabling precise pattern width control through subsequent self-aligned etching processes. This preliminary structuring allows fine pattern formation without requiring photolithography to directly achieve the final dimensions
2Manufacturing precision
If sacrificial cores and spacers are formed to create fine patterns, then pattern width precision is improved, but the number of process steps increases
Solution Approach 1:
Multiple functions are merged into single process steps where possible. For example, spacers are formed to simultaneously define patterns in multiple regions with different width requirements. The same spacer structure serves as both a pattern definition element and a protective mask for adjacent regions, reducing the total number of separate processing steps
Solution Approach 2:
The spacer structure performs multiple functions: it defines the pattern width for fine pattern regions, acts as a protective mask for regions requiring wider patterns, and enables self-aligned etching. This multi-functionality allows a single spacer formation process to replace what would otherwise require multiple separate lithography and etching steps
3Productivity
If spacers are used as etch masks for multiple regions, then process steps are reduced and productivity improves, but selective protection of different regions becomes more difficult
Solution Approach 1:
Different regions are given different local properties through selective sacrificial core formation and spacer placement. The first region receives spacers for fine pattern definition, while the second region uses the same spacer structure as a protective mask. This local differentiation allows each region to receive appropriate processing while using a unified overall approach
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the simultaneous formation of fine patterns with varying widths in different regions of a semiconductor device, enhancing the manufacturing process and improving the reliability of transistors, particularly for I/O transistors and laterally diffused MOSFETs, by using spacers as etch masks in a dry etch process.
Implementation Method 1
forming spacers on side walls of the first sacrificial cores and side walls of the second sacrificial cores... etching the lower structure using the spacers on the first region, and the second sacrificial cores and the spacers on the second region
Data Source
AI summary
A method of manufacturing a semiconductor device includes forming first sacrificial cores on a first region of a lower structure and second sacrificial cores on a second region of the lower structure, forming spacers on side walls of the first sacrificial cores and side walls of the second sacrificial cores, forming a protective pattern covering the second sacrificial cores on the second region of the lower structure, removing the first sacrificial cores from the first region, and etching the lower structure using the spacers on the first region, and the second sacrificial cores and the spacers on the second region. By using only spacers as an etching mask in the first region and the sacrificial cores with the spacers as an etching mask in the second region, patterns with different widths are formed simultaneously on the first and second regions.