Semiconductor Device Split Gate Radiation Tolerance
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Solution Overview
Problem
Semiconductor devices used in radiation environments face challenges with low Total Ionizing Dose (TID) and Single Event Gate Rupture (SEGR) tolerance, which affect their reliability and performance.
Innovation Solution
A semiconductor device with a split gate structure and a specific design that includes a semiconductor substrate with body regions, a neck portion, and insulating films, where the gate electrodes are positioned opposite the body regions and the neck portion, and a protruding portion is formed to enhance radiation tolerance by reducing electric field concentration and preventing defects in the insulating films.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional MOS-type semiconductor device is used in a radiation environment, then the device can operate in space or nuclear power plant conditions, but the radiation exerts harmful effects such as TID and SEGR that reduce device reliability
Solution Approach 1:
The gate electrode is divided into a first gate electrode and a second gate electrode that are separated and positioned at different locations. This segmentation prevents plasma filament formation and reduces SEGR effects by eliminating the continuous conductive path that radiation can create through a single gate structure.
Solution Approach 2:
An insulating film is introduced between the gate electrode and the semiconductor substrate. This intermediary layer prevents direct electrical contact, thereby preventing plasma filament formation and reducing the harmful effects of radiation on the device operation.
2Area of stationary object
If the gate electrode is positioned close to the body region for compact design, then device area is reduced, but electric field concentration increases leading to higher radiation susceptibility
Solution Approach 1:
The first and second gate electrodes are positioned asymmetrically at different locations relative to the body region, with each gate electrode having an end portion that does not overlap with the body region in plan view. This asymmetric positioning reduces electric field concentration while maintaining compact device area.
Solution Approach 2:
The problem of electric field concentration is addressed by considering the three-dimensional positioning of gate electrodes, where the end portions of the gate electrodes are positioned to not overlap with the body region in plan view, effectively utilizing spatial arrangement to reduce field concentration.
3Reliability
If radiation tolerance is enhanced through structural modifications, then TID and SEGR tolerance increase, but device complexity increases
Solution Approach 1:
The gate electrode is segmented into first and second gate electrodes positioned at different locations, which prevents plasma filament formation and reduces SEGR effects while maintaining a relatively simple overall device structure that can be integrated into conventional semiconductor manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution increases both TID and SEGR tolerance, maintaining the reliability of the semiconductor device by reducing defect generation in insulating films and preventing plasma filament formation, thus enhancing its performance in radiation environments.
Implementation Method 1
insulating films serially provided between the first gate electrode and a semiconductor substrate, between the second gate electrode and the semiconductor substrate
Implementation Method 2
The first body region and the second body region may have a protruding portion which protrudes to the neck portion side beyond the end portion on the front surface of the semiconductor substrate
Data Source
AI summary
A semiconductor device with a high radiation tolerance is provided. A semiconductor device comprising a semiconductor substrate, a first body region and a second body region provided on a front surface side of the semiconductor substrate, a neck portion provided between the first body region and the second body region, a first source region formed within the first body region and a second source region formed within the second body region, a first gate electrode provided to face the first body region between the first source region and the neck portion, a second gate electrode provided to face the second body region between the second source region and the neck portion, and an insulating film continuously provided between the first gate electrode and the semiconductor substrate, between the second gate electrode and the semiconductor substrate, and on the front surface side of the neck portion, is provided.