Semiconductor Stack Bonding for Higher Layer Density
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Solution Overview
Problem
The limitation on the total height of the package restricts the number of chips that can be stacked and packaged, thereby limiting the total capacity of the memory.
Innovation Solution
A semiconductor structure is designed with a configuration that includes a plurality of stack layers connected by first and second bonding structures, where the second bonding structure is located between device layers to prevent damage during transfer and increase thickness, and the first bonding structure is used to connect stack layers, ensuring continuous dicing traces are only on the side walls of the stack layers, allowing for increased stacking efficiency and capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the package height is increased to stack more chips, then the total capacity of the memory is improved, but the manufacturing complexity and risk of damage during transfer increase
Solution Approach 1:
The patent divides the bonding structures into two distinct types: first bonding structures for connecting device layers within a stack, and second bonding structures for connecting separate stacks. This segmentation allows each bonding structure to be optimized for its specific function, simplifying the overall manufacturing process while enabling higher capacity through increased stacking.
Solution Approach 2:
The patent introduces dummy bonding structures as intermediaries during the stacking process. These dummy structures facilitate the transfer and alignment of device layers without compromising the actual bonding quality, thereby reducing manufacturing complexity and damage risk while enabling higher capacity stacking.
2Quantity of substance
If the package height is increased to stack more chips, then the total capacity of the memory is improved, but the reliability and risk of damage during transfer worsen
Solution Approach 1:
The patent employs dummy bonding structures that serve as protective intermediaries during the transfer process. These structures are prepared in advance to cushion and protect the device layers from damage during stacking operations, thereby maintaining high reliability even as package height and capacity increase.
Solution Approach 2:
By introducing dummy bonding structures as intermediaries, the patent creates a protective buffer zone during transfer operations. These intermediaries absorb mechanical stresses and prevent direct contact between potentially damaging surfaces, thereby reducing the risk of damage while enabling higher capacity stacking.
3Quantity of substance
If device layers are made thinner to increase stacking density, then the number of layers that can be stacked is improved, but the strength and susceptibility to damage during transfer worsen
Solution Approach 1:
The dummy bonding structures serve as pre-prepared cushioning elements that protect thin device layers during transfer. By having these protective structures in place before the transfer operation, the patent enables the use of thinner device layers without increasing susceptibility to damage, thereby allowing higher stacking density.
Solution Approach 2:
The dummy bonding structures act as intermediary protective elements between the handling tools and the thin device layers. This intermediary layer distributes mechanical stresses and prevents direct contact that could damage the thin layers, enabling higher numbers of layers to be stacked safely.
4Ease of manufacture
If continuous dicing traces are present on all surfaces for easier manufacturing, then the ease of manufacture is improved, but the device complexity and potential damage points increase
Solution Approach 1:
The patent applies continuous dicing traces selectively only on the side walls of the stacks rather than on all surfaces. This local application of the feature maintains ease of manufacture where needed while avoiding the addition of unnecessary complexity and potential damage points on other surfaces, thereby optimizing the overall device structure.
Data Source
AI summary
Examples of the present application provide a semiconductor structure and a fabrication method thereof, relate to the field of semiconductor chip technologies, and aim to stack more device layers in a semiconductor structure and in turn increase the number of the device layers packaged in the semiconductor structure. The semiconductor structure provided by an example of the present application includes a plurality of stack layers that are stacked and a first bonding structure, wherein two adjacent stack layers are connected together through the first bonding structure; the stack layer includes a plurality of device layers that are stacked and a second bonding structure with two adjacent device layers connected through the second bonding structure. After connecting device layers together through the second bonding structure, the thickness of the device layers can be reduced.