Semiconductor Die Stack-Up Using Bulk Substrate Heat Spreading

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Solution Overview

Problem

Semiconductor dies face thermal reliability issues due to local temperature hotspots, leading to thermal design power capping and reduced overclocking performance, as silicon substrates have high thermal resistance, causing inadequate heat dissipation.

Innovation Solution

Integration of a heat spreader with lower thermal resistance than the semiconductor substrate, bonded using thin layers of oxide or nitride to enhance thermal spreading, which reduces the thickness of the semiconductor substrate and improves heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a silicon substrate is used for the semiconductor die, then the device can be manufactured with standard processes, but the high thermal resistance causes local temperature hot spots and reduces thermal reliability

Engineering Contradiction:
ImprovemanufacturabilityVSAvoidthermal reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent replaces the pure silicon substrate with a composite structure consisting of a semiconductor layer stacked on a heat spreader layer. The heat spreader is made of materials with higher thermal conductivity than silicon (such as diamond, cubic boron nitride, or graphite), creating a composite substrate that maintains manufacturability while dramatically improving thermal conductivity to eliminate hot spots and enhance thermal reliability.

Inventive Principle:
Principle #40Composite materials

2Reliability

If the power consumption is reduced to mitigate hot spots, then thermal reliability improves, but the frequency specifications and overclocking performance decrease

Engineering Contradiction:
Improvethermal reliabilityVSAvoidfrequency performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the thermal management function from the electrical circuit design and implements it as a separate physical layer (the heat spreader layer) beneath the semiconductor layer. This allows the device to maintain full power consumption for high frequency performance while the dedicated heat spreader layer actively removes heat, preventing thermal reliability issues without requiring power reduction.

Inventive Principle:
Principle #2Taking out (Extraction)

3Strength

If standard silicon substrate thickness is used, then the substrate provides sufficient mechanical strength, but the thermal resistance remains high causing inadequate heat dissipation

Engineering Contradiction:
Improvemechanical strengthVSAvoidthermal performance
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent creates a composite substrate where a thin semiconductor layer (providing mechanical integrity) is stacked on a heat spreader layer (providing superior thermal conduction). This composite structure achieves both mechanical strength and enhanced thermal performance, as the heat spreader material has higher thermal conductivity than silicon while the thin semiconductor layer maintains structural integrity.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The integrated heat spreader effectively mitigates non-uniform heating, allowing for improved thermal performance and increased overclocking capabilities by efficiently dissipating heat from hotspots.

Implementation Method 1

The integrated heat spreader effectively mitigates non-uniform heating, allowing for improved thermal performance and increased overclocking capabilities by efficiently dissipating heat from hotspots

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS11756860B2Semiconductor device stack-up with bulk substrate material to mitigate hot spots
Publication Date: 2023.09.12 INTEL CORP
  • US11756860B2 patent drawing
  • US11756860B2 patent drawing
  • US11756860B2 patent drawing

AI summary

Embodiments disclosed herein include semiconductor dies and methods of forming such dies. In an embodiment, the semiconductor die comprises a semiconductor substrate, an active device layer in the semiconductor substrate, where the active device layer comprises one or more transistors, an interconnect layer over a first surface of the active device layer, a first bonding layer over a surface of the semiconductor substrate, a second bonding layer secured to the first bonding layer, and a heat spreader attached to the second bonding layer.