Semiconductor Structure Stack for High Aspect Ratio Capacitors
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Solution Overview
Problem
High aspect ratio capacitor columns in semiconductor memory devices face challenges such as bending, wobbling, and reduced capacitance due to increased height, which complicates data storage and processing, especially with volatile memory cells like DRAM, where capacitor material filling is difficult and may lead to shorts.
Innovation Solution
A method involving the sequential stacking of silicate and nitride materials using wet and dry etch processes to widen the gap between electrode materials, increasing the capacitor height and width while maintaining structural integrity, thereby enhancing capacitance and reducing the aspect ratio from 25:1 to 75:1.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If capacitor column height is increased to increase capacitance, then storage capacitance value is improved, but structural stability deteriorates due to bending and wobbling
Solution Approach 1:
The capacitor column is segmented into multiple sections with alternating high-k dielectric materials (e.g., barium strontium titanate, lead zirconate titanate) and spacer materials (e.g., silicon oxide, silicon nitride). This segmentation allows the column to maintain height for increased capacitance while the spacer materials provide structural support to prevent bending and wobbling.
Solution Approach 2:
The capacitor column uses composite material structure combining high-k dielectric materials with spacer materials having different mechanical and electrical properties. The high-k dielectric materials provide high capacitance while the spacer materials provide structural integrity, creating a composite column that achieves both high capacitance and structural stability.
2Quantity of substance
If capacitor column height is increased to increase capacitance, then storage capacitance value is improved, but manufacturing difficulty increases due to filling challenges and short risks
Solution Approach 1:
The capacitor column is segmented into multiple sections with alternating high-k dielectric materials (e.g., barium strontium titanate, lead zirconate titanate) and spacer materials (e.g., silicon oxide, silicon nitride). This segmentation allows the column to maintain height for increased capacitance while the spacer materials provide structural support to prevent bending and wobbling.
Solution Approach 2:
Spacer materials are deposited beforehand to define the boundaries and structural framework of the capacitor column before filling with high-k dielectric materials. This preliminary action creates a template that guides the filling process and ensures proper structural formation, reducing manufacturing difficulty.
3Reliability
If aspect ratio is reduced by increasing capacitor width, then structural stability is improved, but device area increases
Solution Approach 1:
The patent transitions from a two-dimensional planar capacitor structure to a three-dimensional vertical stack structure. By stacking multiple capacitor sections vertically with alternating high-k dielectric and spacer materials, the design achieves increased capacitance and improved structural stability without proportionally increasing the lateral device area, as the capacitance enhancement comes primarily from the vertical dimension.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the storage capacitance value by widening the capacitor structure, allowing for greater data storage while maintaining structural stability and preventing shorts, thus improving the performance of semiconductor memory devices.
Implementation Method 1
A wet etch process may be used to widen the gap between the electrode materials
Implementation Method 2
A dry etch process may be used to etch a portion of the nitride material
Data Source
AI summary
Methods, apparatuses, and systems related to stack a semiconductor structure are described. An example method includes stacking a semiconductor structure between electrode materials having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes forming a third silicate material on the second nitride. The method further includes forming a third nitride on the third silicate material. The method further includes using a wet etch process to increase a width between electrode materials. The method further includes using a dry etch process to remove a portion of materials within the semiconductor structure.