Semiconductor Stack Staircase Layout for Dense Gate Connections
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Solution Overview
Problem
The increasing number of stacked gate electrodes in semiconductor devices complicates the electrical connection process, leading to difficulty in achieving high integration density and resulting in unexpected defects.
Innovation Solution
A semiconductor device with a stack structure that includes a gate region and an insulating region, featuring a staircase structure in the connection region, where the stack structure is composed of alternately stacked first and second layers, including gate layers, mold layers, gate pads, and mold pads, with specific thickness and length configurations to enhance integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of stacked gate electrodes is increased to improve integration density, then integration density is improved, but difficulty in electrically connecting the gate electrodes to peripheral circuits increases
Solution Approach 1:
The connection region is divided into multiple connection regions corresponding to different height levels of the stack structure. Gate electrodes at different heights can be connected to peripheral circuits through different connection regions, segmenting the complex connection task into manageable parts and reducing overall connection difficulty
Solution Approach 2:
The patent introduces a vertical dimension to the connection architecture by creating connection regions at different heights. This allows gate electrodes stacked vertically to be connected through horizontally separated paths at different elevation levels, transforming a complex vertical connection problem into a more manageable multi-level horizontal connection system
2Quantity of substance
If the number of stacked gate electrodes is increased to improve integration density, then integration density is improved, but unexpected defects occur
Solution Approach 1:
The stack structure is segmented into multiple height levels with corresponding connection regions, allowing defects to be isolated to specific segments rather than affecting the entire structure. This modular approach improves reliability by containing potential failure points
Solution Approach 2:
Connection regions serve as intermediary structures between the stacked gate electrodes and peripheral circuits. These intermediaries provide buffered connection points that can accommodate variations and reduce the propagation of defects through the system
Data Source
AI summary
A semiconductor device includes a lower structure and a stack structure that extends into a connection region on the lower structure, where the stack structure includes gate pads and mold pads. The mold pads include intermediate mold pads that include first intermediate mold pads and a second intermediate mold pad between a pair of the first intermediate mold pads, each of the first intermediate mold pads has a first length in a first direction, the second intermediate mold pad has a second length in the first direction, greater than the first length, one of the intermediate mold pads includes a mold pad portion and an insulating protrusion portion on the mold pad portion, one of the first intermediate mold pads includes the mold pad portion and the insulating protrusion portion, and a central region of the second intermediate mold pad does not include the insulating protrusion portion.