3D Semiconductor Stack Hydrophobic Passivation Etch Selectivity
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Solution Overview
Problem
Current methods for manufacturing three-dimensional semiconductor devices face challenges in achieving reliable mass production due to limitations in integration density and etch selectivity between sacrificial and insulating layers.
Innovation Solution
The method involves forming a stack structure with alternately stacked sacrificial and insulation layers, creating openings, trenches, and recessed regions, and using passivation elements to enhance etch selectivity and resistivity, allowing for the formation of semiconductor elements, data storage elements, and conductive elements within these structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If three-dimensional semiconductor devices are manufactured using conventional methods, then device fabrication can proceed, but integration density is limited and etch selectivity between sacrificial and insulating layers is insufficient
Solution Approach 1:
A passivation layer is formed on the insulating layer before etching the sacrificial layer. This preliminary protective action prevents the etching agent from damaging the insulating layer, thereby achieving high etch selectivity without requiring complex process adjustments
Solution Approach 2:
The passivation layer acts as an intermediary between the etching agent and the insulating layer. It selectively protects the insulating layer during etching while allowing the sacrificial layer to be removed, solving the selectivity issue without complicating the overall device structure
2Productivity
If integration density is increased in two-dimensional semiconductor devices, then more devices can be packed, but the planar area limit and fine pattern formation ability become constraining factors
Solution Approach 1:
The invention transitions from two-dimensional planar device layout to three-dimensional vertical stacking. Multiple insulating layers and sacrificial layers are stacked vertically to form a three-dimensional structure, enabling integration density to increase in the vertical dimension rather than being constrained by planar area
3Manufacturing precision
If passivation elements are formed to increase etch selectivity, then etching precision improves, but additional process steps are required
Solution Approach 1:
The passivation layer changes the chemical parameters of the insulating layer surface by forming a hydrophobic coating. This parameter change increases resistivity to the etching agent, improving etch precision through material property modification rather than complex process control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases integration density and etch selectivity, enabling the reliable production of three-dimensional semiconductor devices with improved performance and efficiency.
Implementation Method 1
one or more of the passivation elements comprises a hydrophobic material
Implementation Method 2
formed by reacting one or more hydroxyl (—OH) groups on the surface of an insulation layer with a silicon-containing passivation agent and/or by reacting one or more hydroxyl (—OH) groups on the surface of an insulation layer with a passivation agent comprising one or more hydrocarbons (CxHy)
Data Source
AI summary
The inventive concept provides methods of manufacturing three-dimensional semiconductor devices. In some embodiments, the methods include forming a stack structure including sacrificial layers and insulation layers, forming a trench penetrating the stack structure, forming a hydrophobic passivation element on the surfaces of the insulation layers that were exposed by the trench and selectively removing the sacrificial layers.