Semiconductor Layer Stack Etching With Liner-Protected Sacrificial Layers

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Solution Overview

Problem

Conventional methods for forming semiconductor structures face challenges in achieving less stringent etch selectivity standards, leading to dislocations and limited freedom in choosing layer materials, which affects the scalability and performance of complementary FETs.

Innovation Solution

A method involving a layer stack with alternating sacrificial layers of different materials, protected by liner layers and inner spacers, allows for selective etching and minimizes dislocations, enabling a larger choice of materials and improved strain distribution, resulting in a stable semiconductor structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional etching methods are used to form semiconductor structures, then the etching process can be simplified, but dislocations occur and manufacturing precision deteriorates

Engineering Contradiction:
Improveetching process simplicityVSAvoiddislocation control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

A liner layer is introduced as an intermediary between the sacrificial layers and the etching environment. This liner layer protects the sacrificial layers from direct etching damage, preventing dislocations while allowing the etching process to proceed. The liner layer acts as a buffer that mediates the interaction between the etchant and the sacrificial structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The liner layer is deposited beforehand to cushion and protect the sacrificial layers from etching-induced stress and damage. This pre-protective measure prevents dislocations from forming during the etching process, maintaining manufacturing precision while keeping the process relatively simple.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If sacrificial layers are removed to form cavities, then device isolation is improved, but structural stability deteriorates due to material removal

Engineering Contradiction:
Improvedevice isolationVSAvoidstructural stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

Different regions of the structure are treated differently: the liner layer is retained in regions where structural support is needed, while sacrificial layers are removed in regions where isolation is required. This local differentiation allows the structure to achieve both good isolation and maintained stability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The structure employs a composite of different materials (sacrificial layers, liner layers, dielectric materials) with different properties. The liner layer provides structural integrity while dielectric materials provide isolation, creating a composite structure that achieves both stability and isolation simultaneously.

Inventive Principle:
Principle #40Composite materials

3Adaptability or versatility

If multiple sacrificial layers are used with different materials, then material selection freedom is improved, but process complexity worsens

Engineering Contradiction:
Improvematerial selection freedomVSAvoidprocess complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The sacrificial structure is segmented into multiple layers with different materials (first sacrificial layers and second sacrificial layers), each potentially serving different functions or providing different material properties. This segmentation enables versatile material selection while maintaining a systematic, manageable process structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The liner layer serves multiple functions: it protects sacrificial layers during etching, provides a interface between different materials, and maintains structural integrity. This multi-functionality reduces the need for additional specialized layers, thereby reducing overall process complexity despite using multiple sacrificial materials.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Manufacturing precision

If inner spacers are formed to protect sacrificial layers, then manufacturing precision is improved, but device complexity worsens

Engineering Contradiction:
Improvesacrificial layer protectionVSAvoidstructure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The inner spacers are nested within the recesses formed in the sacrificial layers, creating a compact hierarchical structure. The spacers are positioned precisely within the existing structure rather than adding external complexity, achieving protection while maintaining a relatively simple overall architecture.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The inner spacers are formed preliminarily before the critical etching steps that could damage the sacrificial layers. This preliminary protective measure ensures precision is maintained from the outset, preventing the need for complex corrective measures later in the process.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method reduces the risk of dislocations and lattice mismatch, facilitating a high-quality semiconductor structure with improved device performance and scalability, allowing for thicker middle dielectric isolation and reduced leakage current.

Implementation Method 1

removing the at least one second sacrificial layer of the second sub-stack by etching, thereby forming at least one first cavity, while first sacrificial layers of the second sub-stack are being protected from (e.g., the act of) etching by the inner spacers and the liner layers

Methodology Applied
Scientific EffectSelective etching:

Data Source

PatentUS20250212440A1Method for forming a semiconductor structure
Publication Date: 2025.06.26 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • US20250212440A1 patent drawing
  • US20250212440A1 patent drawing
  • US20250212440A1 patent drawing

AI summary

The present disclosure provides a method for forming a semiconductor structure. The method includes forming a layer stack on a substrate. The layer stack includes a first sub-stack, and a second sub-stack on the first sub-stack. The second sub-stack includes a plurality of sacrificial layers alternating between first and second sacrificial layers, wherein neighboring first and second sacrificial layers of the second sub-stack are separated by a liner layer. The layer stack also includes a third sub-stack on the second sub-stack. The method further includes forming recesses in the layer stack, forming inner spacers in the recesses, removing the at least one second sacrificial layer of the second sub-stack by etching, thereby forming at least one first cavity, and filling the at least one first cavity with dielectric material thereby forming at least one dielectric layer.