Semiconductor Stacked Body with Variable Columnar Pitch
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving low resistance in conductive layers within stacked bodies, which is crucial for efficient memory cell operation and data storage.
Innovation Solution
The semiconductor device incorporates a stacked body with alternating conductive and insulating layers, featuring columnar portions with charge-trapping memory films and a staggered arrangement of columnar portions with different pitch lengths, allowing for efficient growth of conductive layers by alternating first and second pitch regions, thereby reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional stacked body structures are used, then device integration is achieved, but conductive layer resistance remains high
Solution Approach 1:
The stacked body is divided into multiple pitch regions with different pitch lengths (first pitch regions and second pitch regions). This segmentation allows different areas to have optimized conductive layer thicknesses, enabling lower resistance in critical areas while maintaining overall device integration.
Solution Approach 2:
Different pitch regions are assigned different pitch lengths to create local variations in conductive layer thickness. Areas requiring lower resistance (first pitch regions) have larger pitch lengths, while other areas (second pitch regions) have smaller pitch lengths, optimizing performance locally without increasing overall device complexity.
2Reliability
If pitch length is increased to reduce resistance, then conductive layer thickness can be increased, but device area increases
Solution Approach 1:
The device is segmented into first pitch regions with larger pitch lengths for low-resistance requirements and second pitch regions with smaller pitch lengths for area-sensitive areas. This allows the device to achieve low resistance where needed without proportionally increasing the total device area.
Solution Approach 2:
The pitch length parameter is varied across different regions of the stacked body. By changing this geometric parameter locally, the conductive layer thickness and resistance characteristics are optimized for different functional requirements without uniformly increasing device area.
Data Source
AI summary
A semiconductor device includes a base, a stacked body, a plate-shaped portion, and first to third columnar portions. The stacked body is provided over the base. The plate-shaped portion is inside the stacked body from an upper end of the stacked body to the base. The first to third columnar portions are inside the stacked body from the upper end of the stacked body to the base. The second columnar portion is located away from the first columnar portion in a first direction. The third columnar portion is aligned with the first columnar portion and the second columnar portion in the first direction. A pitch between the third columnar portion and the first columnar portion is a first pitch. A pitch between the third columnar portion and the second columnar portion is a second pitch larger than the first pitch.