Semiconductor Device with Thermal Insulator Between Stacked Chips
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Solution Overview
Problem
Conventional semiconductor devices with multiple chips in a single package face challenges in reducing thickness and efficiently dissipating heat from chips with different power consumptions and heat densities, leading to potential abnormal operations due to increased package thickness and inadequate heat dissipation.
Innovation Solution
A semiconductor device structure featuring die pads at different heights with a thermal insulator between chips to prevent heat transfer, allowing for electrical and thermal isolation of chips with varying power consumptions, and a method of fabrication that includes mounting chips on isolated die pads with a sealing resin and a thermal insulator to manage heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple semiconductor chips are mounted on die pads at different heights to reduce package area, then the package area is reduced, but the package thickness increases
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement of chips to a three-dimensional stacked arrangement on die pads at different heights. This vertical stacking enables higher chip density within the same package footprint while the thermal insulator manages the increased vertical heat transfer paths, effectively resolving the area-thickness contradiction.
2Productivity
If chips with different power consumptions are mounted close together to increase density, then mounting density is improved, but heat dissipation becomes inadequate leading to abnormal operations
Solution Approach 1:
The thermal insulator serves as an intermediary element positioned between adjacent semiconductor chips with different power consumptions. This intermediary structure prevents excessive heat transfer from high-power chips to adjacent low-power chips, enabling high-density mounting while maintaining adequate thermal management and preventing abnormal operations.
3Volume of stationary object
If die pads are positioned at different heights to enable three-dimensional chip overlap, then package size is reduced, but heat isolation between chips becomes difficult
Solution Approach 1:
The patent applies local quality by positioning thermal insulators specifically in regions where heat isolation is needed between chips on different die pads. This localized thermal management approach enables three-dimensional chip stacking for reduced package volume while maintaining necessary heat isolation between adjacent chips with different thermal characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high-density mounting of semiconductor chips within the same package without increasing thickness, ensuring stable operation by isolating heat generation from each chip and allowing efficient heat dissipation, thus preventing abnormal operations.
Implementation Method 1
a thermal insulator between chips to prevent heat transfer, allowing for electrical and thermal isolation of chips with varying power consumptions
Data Source
AI summary
A semiconductor device includes a first die pad, a first semiconductor chip provided on the first die pad, a second die pad, a second semiconductor chip provided on the second die pad, and a sealing resin made of a first resin material, sealing the first die pad, the first semiconductor chip, the second die pad and the second semiconductor chip. A lower surface of the first semiconductor chip is connected to the first die pad. A first portion of a lower surface of the second semiconductor chip is connected to the second die pad, and a second portion not connected to the second die pad of the lower surface of the second semiconductor chip is connected to an upper surface of the first semiconductor chip via a second resin material different from the first resin material.