Stacked Defect Detection Lines in Semiconductor Interconnects
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving high integration density and performance while effectively detecting defects, particularly during the sawing process, which can lead to chipping defects.
Innovation Solution
A semiconductor device design featuring a substrate with a cell region and a peripheral region, including an interconnection structure with stacked lines and contact plugs, and a defect detection structure with multiple defect detection lines and contact plugs at different levels, allowing for comprehensive defect detection across various levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If integration density is increased to improve device performance, then productivity and performance are improved, but defect detection capability deteriorates due to reduced space for detection structures
Solution Approach 1:
The patent implements multi-level defect detection lines stacked at different vertical levels (first, second, and third levels) to detect defects in the interconnection structure. By transitioning from a single-plane detection approach to a multi-dimensional stacked configuration, the system can detect defects throughout the vertical depth of the interconnection structure without requiring additional lateral space, thus resolving the contradiction between high integration density and defect detection capability
Solution Approach 2:
The defect detection lines are nested within the peripheral region of the substrate, with multiple detection lines at different levels contained within the boundary defined by the outermost detection line. This nesting approach allows comprehensive multi-level defect detection while minimizing the space occupied by detection structures, enabling high integration density to be maintained without sacrificing defect detection capability
2Reliability
If multiple defect detection lines at different levels are added to improve defect detection capability, then reliability is improved, but device complexity increases
Solution Approach 1:
The defect detection lines are configured to detect multiple types of defects simultaneously, including chipping defects at edges, bridging defects between adjacent lines, and opening defects within lines. The same multi-level detection structure serves both defect detection and potential signal transmission functions, reducing the need for separate dedicated detection structures and thereby limiting the increase in device complexity
Solution Approach 2:
The patent combines the defect detection function with the existing interconnection structure by forming detection lines using the same conductive materials and fabrication processes as the functional interconnection lines. The contact plugs connecting detection lines at different levels are integrated with the existing contact plug structure, merging defect detection functionality into the existing device architecture rather than adding entirely separate detection systems
3Manufacturing precision
If comprehensive defect detection is implemented to improve reliability, then manufacturing precision is improved, but ease of manufacture deteriorates due to additional fabrication steps
Solution Approach 1:
The defect detection lines and contact plugs are formed during the same fabrication stages as the functional interconnection structures, before final device assembly. By preliminarily integrating detection structures into the fabrication process flow rather than adding post-fabrication testing equipment, the system achieves comprehensive defect detection capability while minimizing the impact on ease of manufacture
Solution Approach 2:
The patent uses the same conductive materials and formation processes for both functional interconnection lines and defect detection lines, maintaining consistent material parameters and fabrication conditions. By keeping material and process parameters uniform across functional and detection structures, the manufacturing precision is improved through consistent fabrication while avoiding the need for separate specialized manufacturing processes
Data Source
AI summary
Provided is a semiconductor device including an interconnection structure provided on a cell region of a substrate to include a first line and a second line sequentially stacked on the substrate, and a defect detection structure provided on a peripheral region of the substrate to include first and second defect detection lines provided at the same levels as those of the first and second lines, respectively.