Semiconductor Device With Stacked Inductor Elements
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Solution Overview
Problem
The existing semiconductor devices used in motor control systems face a challenge in downsizing due to the need for increased separation distance between semiconductor chips to ensure withstand voltage, leading to larger device sizes.
Innovation Solution
The semiconductor device design includes a configuration where the first and second semiconductor chips have inductor elements arranged to overlap in plan view, with a larger creepage distance achieved by using insulative adhesion layers that extend beyond the inductor regions, allowing for a reduced separation distance between chips while maintaining withstand voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the separation distance between the second semiconductor chip and the third semiconductor chip is increased to ensure withstand voltage, then the reliability is improved, but the device size is increased
Solution Approach 1:
The patent transitions from a planar arrangement to a three-dimensional stacked arrangement where the first semiconductor chip is positioned between the second and third semiconductor chips in the vertical direction. This allows the creepage distance to extend through multiple layers (via insulating films and adhesive layers) rather than requiring a large horizontal separation, thus maintaining withstand voltage while reducing the device footprint.
Solution Approach 2:
The first semiconductor chip is nested between the second and third semiconductor chips in the vertical stacking direction. The insulating films and adhesive layers are nested between the semiconductor chips, creating a compact multi-layer structure that achieves adequate creepage distance without increasing the overall device volume.
2Reliability
If the separation distance between the second semiconductor chip and the third semiconductor chip is increased to ensure withstand voltage, then the reliability is improved, but the ease of manufacture is worsened due to larger device size
Solution Approach 1:
The patent utilizes the vertical dimension for stacking semiconductor chips and insulating layers, converting a two-dimensional separation problem into a three-dimensional solution. This approach simplifies manufacturing by using standard stacking processes rather than requiring large-area layout adjustments.
Solution Approach 2:
The structure is segmented into distinct functional layers: second semiconductor chip, first insulating film, first adhesive layer, first semiconductor chip, second adhesive layer, and third semiconductor chip. This segmentation allows each layer to be optimized and manufactured independently, then assembled through standardized bonding processes.
3Volume of moving object
If the inductor elements are arranged to overlap in plan view to reduce device size, then the volume is reduced, but the withstand voltage between chips is compromised
Solution Approach 1:
The patent resolves the conflict between overlapping inductor elements and withstand voltage by introducing vertical separation through multiple insulating films and adhesive layers. The creepage distance is achieved in the vertical dimension rather than requiring horizontal separation, allowing inductor elements to overlap in plan view while maintaining adequate voltage isolation.
Solution Approach 2:
Insulating films and adhesive layers are introduced as intermediary structures between the semiconductor chips. These intermediaries provide the necessary electrical isolation and creepage distance while allowing the inductor elements to be positioned in overlapping configurations for compactness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables the downsizing of semiconductor devices while ensuring adequate withstand voltage between semiconductor chips, thereby reducing the overall size of the motor control system.
Implementation Method 1
signal transfer between the first semiconductor chip and the second semiconductor chip is performed by using inductive coupling between the first inductor element and the third inductor element which overlap each other in plan view
Data Source
AI summary
A semiconductor device includes a first semiconductor chip having a first inductor element and a second inductor element on a first main surface side, a second semiconductor chip having a third inductor element on a second main surface side, and a third semiconductor chip having a fourth inductor element on a third main surface side. The first and second inductor elements are arranged to be separated from each other in a first direction of the first main surface, the first and second main surfaces face each other, and the first and third inductor elements overlap each other. The first and third main surfaces face each other, the second and fourth inductor elements overlap each other, and a creepage distance between the second and third semiconductor chips is larger than a separation distance between the second and third semiconductor chips.