Semiconductor Device Stacked Memory Chips Resin Elimination
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Solution Overview
Problem
There is a need to reduce the cost of applying resin between the controller and memory chip in semiconductor devices while increasing the operational speed of the memory chip.
Innovation Solution
A semiconductor device configuration where memory chips are superposed on a substrate with the controller chip, eliminating the need for resin filling between them, and optimized wiring connections reduce manufacturing costs and enhance operational speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If resin is applied between the controller and memory chip, then the structural stability is improved, but the manufacturing cost increases
Solution Approach 1:
The patent removes the resin layer from the package structure, eliminating the need for resin application processes. The controller and memory chips are directly mounted on the substrate without resin filling, which reduces manufacturing steps and costs while maintaining structural integrity through direct mechanical mounting.
Solution Approach 2:
The substrate serves as an intermediary element that provides mechanical support and electrical connections between the controller and memory chips. Instead of using resin as a bonding medium, the substrate acts as the mediator that holds components in place and provides signal routing, eliminating the need for resin application.
2Stability of the object's composition
If resin is applied between the controller and memory chip, then the structural stability is improved, but the operational speed decreases
Solution Approach 1:
By removing the resin layer, the patent eliminates the additional signal transmission path that resin introduces. Direct mounting on the substrate reduces signal path length and impedance, improving signal integrity and operational speed while maintaining structural stability through the substrate's mechanical support.
3Speed
If wiring length is reduced, then the operational speed is improved, but the layout complexity increases
Solution Approach 1:
The patent utilizes the vertical dimension by stacking memory chips above the controller on the substrate, rather than placing them side-by-side. This three-dimensional arrangement reduces the horizontal distance between components, shortening wiring lengths and improving signal speed while the substrate's routing layers manage the connection complexity.
Data Source
AI summary
A semiconductor device includes a substrate, a controller chip, and memory chips. Wiring is formed on the substrate. The controller chip has a rectangular surface area, and is mounted on the substrate. The memory chips have quadrangular surface areas, and are superposed on the substrate on a first major side of the controller chip. The first major side defines a first direction and a first controller terminal block is formed along a first minor side thereof orthogonal to the first direction, and a second controller terminal block is formed along a second major side opposite to the first major side.