Stacked Wiring Layers for Semiconductor Device Pad Stress Reduction
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Solution Overview
Problem
Conventional III-V nitride semiconductor devices face challenges in reducing the size of electrode pads while maintaining high-power properties, as large electrode pads are necessary for wiring connections, leading to potential damage to underlying interlayer films, especially in power devices with high current flow.
Innovation Solution
A semiconductor device structure with a first wiring layer and a second wiring layer, where the first electrode wires are continuous in some regions and discontinuous in others, with the second electrode wires arranged alternately to cover both regions, reducing stress and damage from external connection terminals, and allowing for shorter electrode wire lengths to minimize on-resistance and maximize current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large electrode pads are used for wiring connections, then wiring connection reliability is improved, but device size reduction is hindered and damage to underlying interlayer films increases
Solution Approach 1:
The patent transitions from a conventional planar pad structure to a three-dimensional stacked wiring structure. Multiple wiring layers (first wiring layer with continuous wires, second wiring layer with discontinuous wires, and third wiring layer with electrode pads) are stacked vertically, allowing wiring connections to be established in the vertical dimension rather than requiring large horizontal pad areas. This dimensional change enables compact device layout while maintaining reliable wiring connections.
Solution Approach 2:
The wiring structure is segmented into multiple functional layers: continuous wires in the first wiring layer for robust electrical connection, discontinuous wires in the second wiring layer for stress reduction, and electrode pads in the third wiring layer for external connections. This segmentation allows each layer to perform its specific function optimally, balancing connection reliability with device size reduction and interlayer film protection.
2Reliability
If large electrode pads are used for wiring connections, then wiring connection reliability is improved, but damage to underlying interlayer films increases
Solution Approach 1:
The wiring structure is segmented into multiple functional layers: continuous wires in the first wiring layer for robust electrical connection, discontinuous wires in the second wiring layer for stress reduction, and electrode pads in the third wiring layer for external connections. This segmentation allows each layer to perform its specific function optimally, balancing connection reliability with device size reduction and interlayer film protection.
Solution Approach 2:
The continuous wires in the first wiring layer act as intermediaries between the discontinuous wires in the second wiring layer and the electrode pads in the third wiring layer. This intermediary structure distributes mechanical stress from external connection terminals across multiple layers and wiring segments, preventing stress concentration that would damage underlying interlayer films while maintaining reliable electrical connections.
3Loss of energy
If electrode wire length is reduced to minimize on-resistance, then current capacity is improved, but wiring connection reliability may worsen
Solution Approach 1:
The wiring structure is segmented into multiple functional layers: continuous wires in the first wiring layer for robust electrical connection, discontinuous wires in the second wiring layer for stress reduction, and electrode pads in the third wiring layer for external connections. This segmentation allows each layer to perform its specific function optimally, balancing connection reliability with device size reduction and interlayer film protection.
Solution Approach 2:
The patent transitions from a conventional planar pad structure to a three-dimensional stacked wiring structure. Multiple wiring layers (first wiring layer with continuous wires, second wiring layer with discontinuous wires, and third wiring layer with electrode pads) are stacked vertically, allowing wiring connections to be established in the vertical dimension rather than requiring large horizontal pad areas. This dimensional change enables compact device layout while maintaining reliable wiring connections.
Data Source
AI summary
A semiconductor device includes a first wiring layer stacked over element electrodes above a silicon substrate and a second wiring layer stacked over the first wiring layer. The first wiring layer includes first source electrode wires and first drain electrode wires. The second wiring layer includes second source electrode wires and second drain electrode wires. The first wiring layer includes a first region and second regions. In the first region, each of the first source electrode wires and the first drain electrode wires is continuous. In each of the second regions, each of the first source electrode wires and the first drain electrode wires is discontinuous. Second source electrode wires and second drain electrode wires are arranged to alternately over the first regions and the second regions in one direction. External connection terminals are not connected over the second regions, and are connected over the first regions.