Semiconductor Device Stair Structure Air Gap Prevention

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In three-dimensional semiconductor devices, air gaps formed in conductive patterns during the fabrication process lead to the punching phenomenon, causing holes and bridges, which complicates the formation of contact plugs and reduces process margin due to the limited thickness of sacrificial films.

Innovation Solution

A semiconductor device and method involving a stacked body with sacrificial films and interlayer insulating films in a stair structure, where pad patterns are formed on exposed sacrificial film ends, and slits are created to remove sacrificial films, allowing for the formation of conductive patterns without air gaps, thereby preventing the punching phenomenon.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If air gaps are formed in conductive patterns during fabrication, then the punching phenomenon occurs causing holes and bridges, but process margin is reduced and reliability deteriorates

Engineering Contradiction:
Improvefabrication reliabilityVSAvoidconductive pattern precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming pad patterns on the sacrificial films before removing the sacrificial films. This ensures that when the sacrificial films are removed, the pad patterns are already in place to prevent air gap formation in the subsequent conductive patterns, thereby preventing the punching phenomenon and maintaining manufacturing precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces pad patterns as an intermediary element between the sacrificial films and the conductive patterns. These pad patterns serve as a mediator that prevents air gap formation during the conductive pattern formation process, thereby eliminating the punching phenomenon and improving fabrication reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If sacrificial films have limited thickness, then device integration is achieved, but process margin for contact plug formation is reduced

Engineering Contradiction:
Improvedevice integrationVSAvoidcontact plug formation precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming pad patterns on the sacrificial films before removing the sacrificial films and forming contact plugs. This preliminary formation of pad patterns provides a buffer zone that increases process margin for contact plug formation, even when sacrificial films have limited thickness, thereby maintaining manufacturing precision while achieving device integration.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If conductive patterns are formed without preventing air gaps, then fabrication process is simplified, but punching phenomenon occurs causing holes and bridges

Engineering Contradiction:
Improvefabrication process simplicityVSAvoidconductive pattern integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by forming pad patterns before removing sacrificial films and forming conductive patterns. This additional preliminary step prevents air gap formation and the subsequent punching phenomenon, maintaining conductive pattern integrity while keeping the fabrication process relatively simple.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces pad patterns as an intermediary element that mediates between the sacrificial films and conductive patterns. This intermediary structure prevents direct air gap formation in the conductive patterns, thereby maintaining conductive pattern integrity without significantly complicating the fabrication process.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9373540B2Semiconductor device and method of fabricating the same
Publication Date: 2016.06.21 SK HYNIX INC
  • US9373540B2 patent drawing
  • US9373540B2 patent drawing
  • US9373540B2 patent drawing

AI summary

A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes conductive patterns and interlayer insulating patterns having a stair structure and being alternately stacked, pad patterns connected to end portions of upper surfaces of the conductive patterns exposed through the stair structure, and a channel film penetrating the conductive patterns and the interlayer insulating patterns.