Semiconductor Stair Step Structure Without Mirror Image Layout
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Solution Overview
Problem
Conventional methods for forming stair step structures in semiconductor devices result in the formation of mirror image stair step structures, leading to underutilization of space and inefficiencies in semiconductor device design.
Innovation Solution
A method of forming a semiconductor device structure with a single stair step structure by creating a stack structure with alternating sacrificial and insulating layers, using a masking structure and photoresist to selectively remove layers and form the stair step structure without forming a mirror image.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional methods are used to form stair step structures, then electrical connections can be established, but mirror image structures are formed causing space underutilization
Solution Approach 1:
The patent applies asymmetry by modifying the conventional symmetric stair step structure formation process. Instead of forming mirror image structures at both ends of the semiconductor device, the method creates an asymmetric configuration where only one end has the full stair step structure while the other end has a reduced or modified structure. This is achieved by selectively removing or modifying specific layers or patterns during fabrication, thereby eliminating the redundant mirror image structure and improving space utilization without compromising the essential electrical connection function.
2Ease of operation
If repeated trimming and etching processes are used to form stair step structures, then electrical access is provided, but manufacturing time and process complexity increase
Solution Approach 1:
The patent applies preliminary action by pre-configuring the stack structure with alternating sacrificial and insulating layers before forming the final stair step structure. This preliminary layering allows for more efficient material removal processes, as the sacrificial layers can be selectively removed to define the stair step geometry in fewer steps compared to conventional repeated trimming and etching. The preliminary structure preparation enables subsequent processes to proceed more quickly while still achieving the required electrical access.
3Ease of manufacture
If conventional stair step formation processes are used, then contact structures can be positioned, but the opposing symmetric structure occupies valuable space
Solution Approach 1:
The patent applies the taking out principle by selectively removing or extracting the redundant mirror image stair step structure from the conventional design. Instead of forming complete symmetric structures at both ends, the method extracts only the necessary stair step features at one end while eliminating or simplifying the structure at the other end. This extraction of unnecessary elements maintains the essential contact structure positioning capability while freeing up valuable die area for other functional elements.
Data Source
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AI summary
A method of forming a semiconductor device structure comprises forming a stack structure over a substrate, the stack structure comprising tiers each independently comprising a sacrificial structure and an insulating structure and longitudinally adjacent the sacrificial structure. A masking structure is formed over a portion of the stack structure. A photoresist is formed over the masking structure and over additional portions of the stack structure not covered by the masking structure. The photoresist and the stack structure are subjected to a series of material removal processes to selectively remove portions of the photoresist and portions of the stack structure not covered by one or more of the masking structure and remaining portions of the photoresist to form a stair step structure. Semiconductor devices and additional methods of forming a semiconductor device structure are also described.