Semiconductor Layer Layout With Stepped Insulator for Threshold Stability

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Solution Overview

Problem

Existing semiconductor devices face challenges in maintaining favorable electrical characteristics and reliability, particularly with increasing screen sizes and definitions, leading to issues with wiring resistance and threshold voltage changes due to electric fields.

Innovation Solution

A semiconductor device design featuring a semiconductor layer with specific regions of varying resistances and insulating layer thicknesses, including LDD regions and a step-like insulating layer structure, to manage electric fields and improve reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Illumination intensity

If the screen size and definition are increased, then the display performance is improved, but the wiring resistance increases

Engineering Contradiction:
Improvedisplay performanceVSAvoidwiring resistance
Core Design Contradiction:
Illumination intensityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating regions with different insulating layer thicknesses within the semiconductor device. Specifically, the insulating layer has a first thickness in the channel formation region and a second thickness (greater than the first) in the LDD regions, allowing different functional requirements to be met in different locations - the thinner layer in the channel for proper electrical characteristics and the thicker layer in LDD regions for field management and reliability

Inventive Principle:
Principle #3Local quality

2Reliability

If the insulating layer thickness is increased to manage electric fields, then the threshold voltage stability is improved, but the device structure complexity increases

Engineering Contradiction:
Improvethreshold voltage stabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the insulating layer into different thickness regions - a first insulating layer with thickness in the channel formation region and a second insulating layer with greater thickness covering the LDD regions. This segmentation allows the device to meet both electrical performance requirements and field management needs without excessive overall complexity

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design provides a semiconductor device with improved electrical characteristics and reliability by reducing wiring resistance and stabilizing threshold voltage, enhancing source-drain withstand voltage.

Implementation Method 1

a first insulating layer over the semiconductor layer, and a conductive layer over the first insulating layer

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

A thickness of the first insulating layer in regions overlapping with the second regions is substantially equal to a thickness of the first insulating layer in a region overlapping with the first region. A thickness of the first insulating layer in regions overlapping with the third regions is smaller than the thickness of the first insulating layer in the regions overlapping with the second regions.

Methodology Applied
Scientific EffectElectrical resistivity control: Electrical Resistance

Data Source

PatentUS12568654B2Semiconductor device and method for manufacturing semiconductor device
Publication Date: 2026.03.03 SEMICON ENERGY LAB CO LTD
  • US12568654B2 patent drawing
  • US12568654B2 patent drawing
  • US12568654B2 patent drawing

AI summary

A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer over the semiconductor layer, and a conductive layer over the first insulating layer. The semiconductor layer includes a first region, a pair of second regions, a pair of third regions, and a pair of fourth regions. The second regions sandwich the first region, the third regions sandwich the first region and the second regions, and the fourth regions sandwich the first region, the second regions, and the third regions. The first region includes a region overlapping with the first insulating layer and the conductive layer, the second regions and the third regions each include a region overlapping with the first insulating layer and not overlapping with the conductive layer, and the fourth regions overlap with neither the first insulating layer nor the conductive layer. A thickness of the first insulating layer in regions overlapping with the second regions is substantially equal to a thickness of the first insulating layer in a region overlapping with the first region. A thickness of the first insulating layer in regions overlapping with the third regions is smaller than the thickness of the first insulating layer in the regions overlapping with the second regions.