Semiconductor Device Noise Suppression Stepped Substrates
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Solution Overview
Problem
Conventional module type power semiconductor devices face challenges in noise suppression, increased manufacturing steps, and higher costs due to the separate mounting of semiconductor chips and lead terminals, as well as the complexity of solder printing and bending accuracy for lead terminals.
Innovation Solution
The semiconductor device features a separated structure with a main circuit and control circuit on distinct substrates, where the control circuit wiring pattern is integrated with the case and lead terminals, allowing for easier mounting and reduced assembly steps, and improved noise suppression through a stepped configuration that separates the control and main circuit substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the control circuit substrate is disposed on the main circuit substrate to prevent noise propagation, then noise suppression is improved, but the step between substrates increases making solder printing difficult
Solution Approach 1:
The control circuit substrate is positioned at a different vertical level (another dimension) relative to the main circuit substrate by utilizing the case's inner wall surface. This stepped configuration maintains noise isolation while eliminating the solder printing difficulty caused by excessive height differences, as the substrates are arranged on different surfaces of the case rather than stacked vertically with large gaps.
2Adaptability or versatility
If semiconductor chips and lead terminals are mounted separately, then assembly flexibility is improved, but manufacturing steps and complexity increase
Solution Approach 1:
The semiconductor chips and lead terminals are integrated into a single mounting process by forming their respective wiring patterns on the same case inner wall surface. This allows both components to be mounted simultaneously in one assembly step, reducing manufacturing complexity while maintaining the flexibility to position each component independently according to design requirements.
3Reliability
If lead terminals require precise bending for mounting, then connection reliability is improved, but manufacturing precision requirements and costs increase
Solution Approach 1:
The lead terminals are pre-positioned and fixed to the case inner wall before the semiconductor chips are mounted. This preliminary action establishes the mounting positions and wiring connections in advance, eliminating the need for precise bending operations during the main assembly process and reducing manufacturing precision requirements while ensuring reliable connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances noise suppression, reduces manufacturing complexity and costs, and improves productivity by simplifying the assembly process and eliminating the need for precise solder printing and bending of lead terminals.
Implementation Method 1
the heat loss generated in the semiconductor chips 105 and 106 and the main circuit wiring pattern 104, which are areas where a large amount of current flows, is conducted to the metal plate 102 via the insulating layer 103. The heat loss conducted to the metal plate 102 is conducted to an external heat radiation mechanism bonded with the metal plate 102, and heat is radiated.
Data Source
AI summary
A semiconductor device includes a plurality of semiconductor elements; first semiconductor chips including first semiconductor elements, the first semiconductor elements being defined as semiconductor elements in the plurality of semiconductor elements and having a current flowing greater than that of the other semiconductor elements; second semiconductor chips having second semiconductor elements, the second semiconductor elements being defined as semiconductor elements in the plurality of semiconductor elements for controlling the first semiconductor elements; an insulating substrate having a first wiring pattern bonded with the first semiconductor chips; and an insulating member having a second wiring pattern mounted with the second semiconductor chips.