Semiconductor Package Stiffener Structure for Flexure Reduction
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Solution Overview
Problem
The increasing circuit density and compact size of semiconductor chips require robust and reliable packaging that minimizes substrate damage and stress, while ensuring mechanical, electrical, and heat dissipation properties without compromising IC package integrity.
Innovation Solution
A semiconductor package design featuring a device carrier with an insulating and conductive layer, a stiffener structure surrounding the periphery to form a cavity, and a manufacturing method involving a base layer, patterned trace layout, insulating layer, and stiffener structures to create device carriers, which enhances structural support and reduces flexure and cracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the chip size is reduced to enable compact IC packages, then the package compactness is improved, but the circuit density increases leading to more interconnecting structures that require spacing, creating structural stress on the substrate
Solution Approach 1:
The substrate is divided into multiple carrier units, each containing a semiconductor die and associated interconnecting structures. This segmentation allows stress distribution across multiple smaller units rather than concentrating stress on a single large substrate, thereby maintaining substrate strength while enabling compact packaging
Solution Approach 2:
The substrate thickness is varied locally - thicker in regions where stress concentration is expected and thinner in regions where compactness is prioritized. This local quality adjustment optimizes the balance between substrate strength and package compactness without compromising overall structural integrity
2Adaptability or versatility
If the circuit density is increased to incorporate more functions, then the functionality is improved, but the substrate becomes more susceptible to damage from stress
Solution Approach 1:
By segmenting the high-density interconnecting structures into multiple carrier units, the patent distributes the mechanical stress across numerous smaller substrates. This prevents stress concentration that would otherwise damage the substrate and compromise reliability, while still achieving the desired functionality through increased circuit density
Solution Approach 2:
The patent incorporates stress-relief features and design elements beforehand to cushion against the stress generated by high-density interconnecting structures. This preventive approach protects the substrate from damage before stress can cause failure, ensuring reliability while maintaining high functionality
3Volume of moving object
If the substrate is made thinner to enable miniature packages, then the package miniaturization is improved, but the mechanical support and robustness are reduced
Solution Approach 1:
The thin substrate is divided into multiple small carrier units, each providing sufficient mechanical support for its contained die and interconnecting structures. This segmentation allows the overall package to be miniaturized while each individual carrier maintains adequate thickness and strength for mechanical support
Data Source
AI summary
A semiconductor package and a manufacturing method thereof are disclosed. The semiconductor package includes a device carrier and a stiffener structure. The device carrier includes at least one insulating layer and at least conductive layer defining at least one trace layout unit. The stiffener structure is disposed on the device carrier, surrounding the periphery of the at least one trace layout unit. The stiffener structure is disposed away from the periphery of the at least one trace layout unit, forming a cavity with the device carrier. The shape and disposition of the stiffener structure enhance the strength of the semiconductor package, impeding flexure to the semiconductor package.