Semiconductor Device Stopper Layer Contact Alignment
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Solution Overview
Problem
The challenge lies in forming contacts directly connected to fine, narrow-pitched wiring in semiconductor devices, particularly in cross-point type memories, where the existing methods face difficulties in achieving precise connections due to positional shifts and require larger electrode pads, leading to increased device size and reduced yield.
Innovation Solution
The semiconductor device employs a structure with periodic patterns of bit and word lines, utilizing stopper layers and guide layers formed through directed self-assembly lithography to enable direct contact formation with bit lines, avoiding short circuits and allowing for reduced device size by eliminating the need for larger electrode pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods are used to form contacts to fine wiring, then contacts can be formed, but positional shifts occur leading to short circuits and reduced yield
Solution Approach 1:
The patent introduces a stopper layer as an intermediary element positioned between adjacent bit lines. This stopper layer acts as a physical barrier and alignment reference that prevents contacts from shifting laterally and causing short circuits. The stopper layer mediates the positioning process by providing a defined boundary that contacts must align with, thereby improving connection precision without requiring higher manufacturing precision for the contact formation process itself.
Solution Approach 2:
The stopper layer is formed in advance before contact formation, establishing predetermined alignment references and protective boundaries. This preliminary action creates a structured framework that guides subsequent contact placement, ensuring that contacts are formed at correct positions with proper spacing from adjacent bit lines, thus preventing positional shifts before they can occur during contact formation.
2Reliability
If larger electrode pads are used to ensure contact connection, then connection reliability improves, but device size increases
Solution Approach 1:
The stopper layer creates localized zones of controlled spacing between bit lines, allowing for precise contact placement in specific critical areas. Rather than requiring uniformly large electrode pads across the entire device, the stopper layer provides localized protection and alignment guidance only where contacts are formed, maintaining connection reliability while minimizing the overall device area by avoiding unnecessary enlargement of electrode pads in non-critical regions.
3Object-affected harmful factors
If electrode pads are enlarged to prevent short circuits, then short circuit risk decreases, but the area available for cell array reduces
Solution Approach 1:
The stopper layer serves as an intermediary protective structure that physically separates adjacent bit lines in the regions where contacts are formed. This mediator prevents short circuits by maintaining defined spacing between bit lines, eliminating the need to enlarge electrode pads for short circuit prevention. Consequently, the cell array area is preserved while still achieving the goal of reducing short circuit risk through the stopper layer's protective barrier function.
Data Source
AI summary
A semiconductor device includes a first pattern comprising first lines at a first interval and second pattern at the first interval. The second lines are between the first lines. A third pattern is above the first and the second patterns in a first and second areas. The third pattern includes third portions spaced from each other at the first interval in the first area and fourth portions spaced from each other at the first interval in the second area. The third portions are directly above the second lines in the first area and the fourth portions are directly above the first lines in the second area. A first contact is between third portions in the first area and connected to a first line of the first pattern. A second contact is between the fourth portions in the second area and connected to a second line of the second pattern.