Semiconductor Storage Device Board Segmentation for Cost Reduction
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Solution Overview
Problem
The manufacturing costs of semiconductor storage devices are limited by the large area occupied by the semiconductor memory chip on the organic board, which restricts the effectiveness of cost reduction strategies.
Innovation Solution
A semiconductor storage device design featuring an organic board with external connection terminals formed into a plane shape, a lead frame with a mounting area positioned relative to the organic board, and a semiconductor memory chip bonded directly to the organic board, reducing the size and increasing adhesive strength while minimizing the size of the storage device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the semiconductor memory chip is mounted on a large-area organic board, then the mounting area is sufficient, but the manufacturing cost increases
Solution Approach 1:
The patent divides the organic board into two functional regions: a mounting area for the semiconductor memory chip and a terminal area for external connection terminals. This segmentation allows each region to be optimized independently, enabling the use of a smaller overall board area while maintaining sufficient mounting space and terminal connectivity, thus reducing material costs without compromising functionality
Solution Approach 2:
The patent arranges external connection terminals in a plane shape on the organic board, utilizing two-dimensional spatial optimization. By strategically positioning terminals within the terminal area and optimizing their layout pattern, the design achieves adequate terminal density and connectivity without requiring excessive board area, thereby reducing manufacturing costs while maintaining mounting capability
2Area of stationary object
If the semiconductor memory chip is directly bonded to the organic board, then the bonding area is reduced, but the bonding strength may be insufficient
Solution Approach 1:
The patent introduces a lead frame as an intermediate component that is pre-bonded to the organic board in the terminal area. This preliminary action creates a robust mechanical and electrical connection foundation before the semiconductor memory chip is mounted. The lead frame serves as a reinforcement structure that enhances overall bonding strength without requiring an increased bonding area between the chip and organic board
Solution Approach 2:
The lead frame acts as an intermediary element between the organic board and the semiconductor memory chip. It provides a mechanical reinforcement structure that distributes stress and enhances bonding reliability. The lead frame's presence allows for strong connections with reduced bonding area, as it shares the mechanical load and provides additional anchoring points
3Ease of operation
If the organic board is used in conventional configurations, then terminal connectivity is achieved, but the device size is large
Solution Approach 1:
The patent applies local quality optimization by concentrating external connection terminals in a specific terminal area rather than distributing them across the entire board. By optimizing the terminal layout density and arrangement within this localized region, the design achieves adequate terminal connectivity and electrical performance without requiring a large overall board area, thus reducing device size while maintaining connectivity functionality
Data Source
AI summary
According to one embodiment, a semiconductor storage device includes an organic board provided with external connection terminals on one surface and formed as an individual piece into a plane shape substantially identical to that of an area where the external connection terminals are provided, a lead frame having a mounting area positioned relative to the organic board, and a semiconductor memory chip bonded to the mounting area.


