Semiconductor Storage Device Low Power Mode Control
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Solution Overview
Problem
Existing semiconductor storage devices face issues with inrush current and logical threshold variations when transitioning out of low power consumption modes, particularly due to the complexity of circuit design required for delaying control signals for each mode, which can lead to failures or malfunctions.
Innovation Solution
A semiconductor storage device design that uses a combination of first and second control signals to set and cancel multiple low power consumption modes, where the first control signal is propagated through a delay path to post-stage memory modules, allowing for sequential mode changes and reducing the need for individual delayed signal wiring, thereby simplifying the circuit design and alleviating inrush current issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If control signals are delayed for each low power consumption mode to alleviate inrush current, then inrush current is reduced, but circuit design becomes complicated
Solution Approach 1:
The patent applies universality by creating a single propagation path that serves multiple low power consumption modes. Instead of implementing separate delay circuits for each mode, one propagation path handles control signals for all modes, reducing circuit complexity while maintaining the ability to control inrush current across different power consumption states
Solution Approach 2:
The patent merges multiple control signal delay functions into a single propagation path. By combining the delay functionality for different low power consumption modes into one shared path, the design reduces the number of components and simplifies the overall circuit architecture while still achieving sequential activation of memory modules
2Speed
If power supply is started to all memory modules simultaneously when cancelling low power consumption mode, then operational speed is improved, but inrush current increases causing ground level rise
Solution Approach 1:
The patent applies preliminary action by using the propagation path to advance the control signal to post-stage memory modules before they are actually activated. This allows the control logic to be prepared in advance, enabling fast mode transitions while the physical power supply activation remains sequential, thus avoiding inrush current problems
Solution Approach 2:
The patent implements skipping by allowing the control signal to rush through the propagation path to future stages, separating the control signal propagation (which can be fast) from the actual power supply activation (which must be sequential). This enables the control logic to move quickly while the physical activation follows a controlled sequence
Data Source
AI summary
A semiconductor storage device having a plurality of low power consumption modes is provided.The semiconductor storage device includes a plurality of memory modules where a plurality of low power consumption modes can be set and cancelled based on a first and a second control signals. At least a part of memory modules of the plurality of memory modules have a propagation path that propagates an inputted first control signal to a post stage memory module. The second control signal is inputted into each of the plurality of memory modules in parallel. Setting and cancelling of the first low power consumption mode of each memory module are performed based on a combination of the first control signal that is propagated through the propagation path and the second control signal. Setting and cancelling of the second low power consumption mode, in which regions where a power source is shut down are different from those in the first low power consumption mode, of each memory module are sequentially performed according to the first control signal that is propagated through the propagation path.