Semiconductor Storage Device Disturbance Detection Control
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Solution Overview
Problem
In semiconductor storage devices like NAND flash memory, the three-dimensional structure leads to memory hole leakage, causing threshold voltage disturbances during writing operations, which necessitates additional reading verify steps, increasing operation time and degrading performance.
Innovation Solution
A control circuit is implemented to determine characteristic variations that may cause disturbances, performing reading verify only when necessary, thereby optimizing the writing sequence and reducing unnecessary verification steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reading verify is performed after every writing operation to check normal writing, then writing reliability is improved, but operation time increases and performance degrades
Solution Approach 1:
The patent applies partial action by performing reading verify only for memory blocks that exhibit characteristic variations indicating potential disturbance, rather than universally verifying all blocks after writing. The control circuit detects characteristic variations (such as threshold voltage shifts or leakage current changes) and selectively triggers reading verify only when necessary, thus avoiding unnecessary verification operations while maintaining reliability for affected blocks.
Solution Approach 2:
The patent implements feedback by continuously monitoring characteristic variations of memory blocks during and after writing operations. The control circuit uses this feedback information to dynamically determine whether reading verify is needed, adjusting the verification strategy based on actual device behavior rather than following a fixed verification schedule for all blocks.
2Measurement precision
If reading verify is performed after every writing operation to detect threshold voltage disturbances, then writing accuracy is improved, but operation time increases
Solution Approach 1:
The patent applies partial action by performing reading verify only for memory blocks that exhibit characteristic variations indicating potential disturbance, rather than universally verifying all blocks after writing. The control circuit detects characteristic variations (such as threshold voltage shifts or leakage current changes) and selectively triggers reading verify only when necessary, thus avoiding unnecessary verification operations while maintaining reliability for affected blocks.
3Productivity
If characteristic variation detection is implemented to determine necessary reading verify, then unnecessary verification is reduced, but device complexity increases
Solution Approach 1:
The patent applies self-service by enabling the memory blocks to self-diagnose their own status through characteristic variation detection. The control circuit monitors parameters such as threshold voltage shifts or leakage current that naturally indicate disturbance conditions, allowing the system to autonomously determine which blocks require verification without external intervention or complex decision-making logic.
Data Source
AI summary
A semiconductor storage device of an embodiment includes a control circuit configured to execute a writing sequence in which a loop including a program operation that writes data to memory cells and a program verify operation that verifies the data written in the memory cells is repeated a plurality of times by increasing a program voltage by a predetermined step-up voltage each time, the control circuit being capable of executing reading verify that verifies the data written in the memory cells in the writing sequence, and the control circuit detects characteristic variation of a characteristic that causes disturbance, and determines whether to perform the reading verify based on a result of the detection.