Semiconductor Storage Device Dynamic Program Voltage Control

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Solution Overview

Problem

Semiconductor storage devices face challenges in maintaining writing speed and preventing the spread and bias of threshold voltage distributions, particularly due to high cell wear, which can lead to overwriting and increased error bits during write operations.

Innovation Solution

The semiconductor storage device employs a write operation strategy that adjusts program and verification voltages based on cell wear, using different step-up amounts for program voltages and verification voltage adjustments to maintain optimal threshold voltage distributions, thereby preventing overwriting and reducing write time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a fixed program voltage is applied in all program loops, then the program operation is simple, but the threshold voltage distribution spreads and biases due to cell wear

Engineering Contradiction:
Improveprogram operation simplicityVSAvoidthreshold voltage distribution control
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The program voltage is changed dynamically based on the program loop number and cell wear state. The controller adjusts the program voltage to have a smaller step-up amount in later program loops compared to earlier ones, preventing threshold voltage distribution spread and bias while maintaining effective programming.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the program voltage parameter adaptively during the write operation. By modifying the program voltage based on the current program loop and detected cell wear, the system optimizes the threshold voltage distribution and prevents overwriting without requiring complex additional hardware.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If verification voltage is not adjusted, then the verification operation is simple, but overwriting occurs due to high cell wear

Engineering Contradiction:
Improveverification operation simplicityVSAvoidoverwriting prevention
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The controller performs a detection operation to count memory cells with threshold voltage above a first threshold, then uses this feedback information to adjust the verification voltage for subsequent program loops. This feedback mechanism enables dynamic verification voltage adjustment that prevents overwriting while maintaining operational simplicity.

Inventive Principle:
Principle #23Feedback

3Productivity

If program voltage step-up amount is large, then writing speed is fast, but threshold voltage distribution biases and spreads

Engineering Contradiction:
Improvewriting speedVSAvoidthreshold voltage distribution control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The program voltage step-up amount is made dynamic rather than fixed. The controller applies a larger step-up amount in early program loops for faster writing, then reduces the step-up amount in later loops to prevent threshold voltage distribution spread and bias, achieving both speed and precision.

Inventive Principle:
Principle #15Dynamics

4Loss of time

If detection operation is not performed, then the write operation is fast, but optimal program voltage adjustment cannot be made

Engineering Contradiction:
Improvewrite operation timeVSAvoidprogram voltage optimization
Core Design Contradiction:
Loss of timeVSManufacturing precision

Solution Approach 1:

The detection operation is performed at strategically chosen points (after specific program loops) to gather information about threshold voltage distribution. This preliminary detection enables subsequent optimization of program and verification voltages, achieving both speed and precision through minimal detection overhead.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11676672B2Semiconductor storage device configured to perform a detection operation after performing a program loop
Publication Date: 2023.06.13 KIOXIA CORP
  • US11676672B2 patent drawing
  • US11676672B2 patent drawing
  • US11676672B2 patent drawing

AI summary

A semiconductor storage device includes memory cells a controller performing a write operation on the memory cells. The write operation includes program loops with a program operation and a verification operation. In a first loop the controller applies a first program voltage and a first verification voltage. Next, a detection operation counts the memory cells with a threshold voltage above a first threshold value. In a second program loop, after the detection operation, the controller applies a second program voltage and a second verification voltage. The values of used for second program voltage and the second verification voltage are set dependent on the counted number of memory cells with a threshold voltage above the first threshold value.