Semiconductor Storage Gate Electrode Layer Length Variation
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Solution Overview
Problem
The existing semiconductor storage devices face challenges in reliability due to complex layered structures and stepped regions with varying lengths of gate electrode layers and insulation layers, which affect the electrical connections and processing difficulties.
Innovation Solution
A semiconductor storage device configuration with alternately stacked gate electrode layers and insulation layers, including a barrier metal film and conductive portions that penetrate the layers, ensuring electrical connections and simplifying the manufacturing process by maintaining consistent thicknesses in terraced and non-terraced portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If gate electrode layers and insulation layers are stacked alternately with varying lengths to form stepped regions, then device functionality is improved, but manufacturing precision deteriorates due to excessive etching
Solution Approach 1:
The patent applies preliminary action by forming a cap layer over the stepped region before etching the contact hole. This cap layer prevents excessive etching of the gate electrode layer during contact hole formation, thereby maintaining manufacturing precision while allowing the stepped structure to provide necessary device functionality.
Solution Approach 2:
The cap layer acts as an intermediary element between the stepped region and the etching process. It protects the gate electrode layer from excessive etching while allowing the contact hole to be formed through the insulation layer and into the semiconductor substrate, thus resolving the contradiction between functionality and manufacturing precision.
2Reliability
If gate electrode layers have varying lengths in stepped regions, then electrical connection complexity increases, but device performance is improved
Solution Approach 1:
The patent segments the structure into distinct regions: a first region with gate electrode layers of first length, a stepped region with varying lengths, and a second region with gate electrode layers of second length. This segmentation allows each region to be optimized independently, improving electrical connection stability while managing overall device complexity.
Solution Approach 2:
The patent applies local quality by providing different gate electrode layer configurations in different regions. The cap layer is specifically placed over the stepped region to provide localized protection, allowing the structure to have varying properties in different areas to optimize both reliability and manage complexity.
3Adaptability or versatility
If multiple contacts are connected to gate electrode layers in stepped regions, then device functionality is enhanced, but processing difficulty increases
Solution Approach 1:
The cap layer is formed in advance over the stepped region before the contact hole etching process. This preliminary action simplifies the manufacturing process by preventing excessive etching during contact hole formation, making it easier to process multiple contacts while maintaining enhanced device functionality.
Solution Approach 2:
The cap layer serves as an intermediary that facilitates the connection of multiple contacts to gate electrode layers in stepped regions. It protects the gate electrode layers during processing while allowing contacts to be formed, thereby enhancing device functionality without significantly increasing processing difficulty.
Data Source
AI summary
A semiconductor storage device includes a layered body with gate electrode layers and first insulating layers alternately stacked in a first direction; a first columnar body extending in the first direction; and a second columnar body extending in the first direction. The gate electrode layers include a first gate electrode layer and a second gate electrode layer. The second gate layer has a length in a second direction is less than a length of the first gate electrode layer in the second direction. The first columnar body includes a first conductive portion that penetrates the first gate electrode layer in the first direction. The second columnar body includes a second conductive portion that penetrates the second gate electrode layer and the first gate electrode layer in the first direction, and an insulating portion disposed between the first gate electrode layer and the second conductive portion.