Semiconductor Storage Device Leakage Current Elimination
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Solution Overview
Problem
In semiconductor storage devices like ReRAM and PCM, leakage currents from half-selected memory cells can interfere with the accurate detection of data in selected cells during read operations, due to voltage changes in the bit lines, leading to potential data inversion and detection errors.
Innovation Solution
The implementation of a switch transistor (SW_sMUX) that is brought to an intermediate state between on and off to manage leakage currents from half-selected memory cells, allowing these currents to be eliminated before data detection, ensuring the selected bit line voltage accurately reflects the data in the selected memory cell.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a relatively-large voltage difference is applied to the selected cell to enable data reading, then data detection capability is improved, but leakage currents from half-selected cells increase causing voltage changes in the bit line
Solution Approach 1:
The patent extracts and removes the harmful leakage currents from half-selected cells by introducing a current elimination circuit. This circuit selectively removes the leakage current component from the bit line while preserving the signal current from the selected cell, thereby resolving the contradiction between maintaining large voltage difference for reading and eliminating leakage current interference.
Solution Approach 2:
The patent introduces an intermediary current elimination circuit between the bit line and the sense amplifier. This intermediary component processes the bit line signal by eliminating leakage currents before the signal reaches the detection stage, allowing both large voltage difference application and accurate data detection to coexist.
2Device complexity
If leakage currents from half-selected cells are allowed to flow, then the read operation can proceed without additional circuit complexity, but the voltage of the selected bit line changes preventing accurate data detection
Solution Approach 1:
The patent introduces an intermediary current elimination circuit between the bit line and the sense amplifier. This intermediary component processes the bit line signal by eliminating leakage currents before the signal reaches the detection stage, allowing both large voltage difference application and accurate data detection to coexist.
3Object-generated harmful factors
If the voltage difference applied to half-selected cells is reduced to minimize leakage, then leakage current is decreased, but the ability to detect data in selected cells is compromised
Solution Approach 1:
The patent extracts and removes the harmful leakage currents from half-selected cells by introducing a current elimination circuit. This circuit selectively removes the leakage current component from the bit line while preserving the signal current from the selected cell, thereby resolving the contradiction between maintaining large voltage difference for reading and eliminating leakage current interference.
Data Source
AI summary
A semiconductor storage device includes first lines second lines, and memory cells. The detection circuit detects data stored in the memory cells. A first transistor is electrically connected to the second lines between the memory cells and the detection circuit. A controller brings the first transistor to an intermediate state between an on-state and an off-state and thereafter brings the first transistor to the on-state to transmit a voltage of the second line to the detection circuit, in a data read operation, while a read voltage is applied to a first memory cell among the memory cells, the first memory cell being connected to a selected first line selectively driven from among the first lines and connected to a selected second line selectively driven from among the second lines, and the first transistor connected to the selected second line.