Semiconductor Storage Device Log Data Autonomy

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Solution Overview

Problem

It is challenging to analyze failures in semiconductor storage devices due to insufficient data for analysis being obtained.

Innovation Solution

A semiconductor storage device with a sequencer that controls the sequence of operations, including reading and writing data, and stores log data in a predetermined memory area when errors occur, allowing for the storage of error occurrence data and address information, enabling failure analysis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If no log data storage function is implemented, then the device complexity is low, but the ability to analyze failures is insufficient due to lack of error data

Engineering Contradiction:
Improvefailure analysis capabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The semiconductor storage device performs self-diagnosis and automatically stores its own error log data in a predetermined memory area when failures occur. The sequencer detects errors during read/write operations and autonomously writes log information including error codes and address data without requiring external diagnostic equipment, enabling the device to serve its own diagnostic needs.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

A predetermined memory area is pre-allocated and prepared for storing log data before any failures occur. The system proactively captures and stores error information at the moment of failure, ensuring that diagnostic data is preserved even if subsequent operations overwrite other memory contents. This preliminary preparation of storage space enables reliable post-failure analysis.

Inventive Principle:
Principle #10Preliminary action

2Loss of information

If log data is stored in a predetermined memory area, then error occurrence data and address information can be preserved, but the available storage space for user data is reduced

Engineering Contradiction:
Improveerror data preservationVSAvoiduser data storage capacity
Core Design Contradiction:
Loss of informationVSQuantity of substance

Solution Approach 1:

The memory device is segmented into distinct functional areas: a predetermined memory area reserved exclusively for log data storage and the remaining memory area available for user data. This segmentation ensures that error log information is isolated and protected from being overwritten by user data operations, while minimizing the impact on overall storage capacity by using only the minimal space necessary for diagnostic purposes.

Inventive Principle:
Principle #1Segmentation

3Ease of operation

If the sequencer autonomously stores log data, then failure diagnostic capability is improved, but the operation sequence complexity increases

Engineering Contradiction:
Improvediagnostic capabilityVSAvoidoperation sequence complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The sequencer, an existing control component responsible for managing read/write operations, is extended to perform the additional function of error detection and log data storage. By making the sequencer multi-functional, the patent avoids adding separate dedicated diagnostic hardware, thereby improving diagnostic capability while minimizing the increase in overall system complexity. The sequencer leverages its existing position in the data flow to capture error information efficiently.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11367472B2Semiconductor storage device
Publication Date: 2022.06.21 KIOXIA CORP
  • US11367472B2 patent drawing
  • US11367472B2 patent drawing
  • US11367472B2 patent drawing

AI summary

A semiconductor storage device of embodiments is a semiconductor storage device including a memory cell array including a plurality of non-volatile memory cells, a sequencer configured to control a sequence based on read operation of reading data from the memory cell array, and a column decoder, the sequencer controlling the sequence of changing a ready/busy signal from ready to busy after receiving a read command and an address signal, reading data from the memory cell array using a sense amplifier after changing the ready/busy signal to the busy, changing the ready/busy signal from the busy to the ready after storing data in the data latch circuit, receiving a data output command after changing the ready/busy signal to the ready, and, in a case where a first condition occurs, writing log data including the data stored in the data latch circuit in a memory area of the memory cell array.