Semiconductor Storage Device Signal Line Routing in Non-Facing Region
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Solution Overview
Problem
As semiconductor storage devices become multifunctional, the increase in the number of row decoders and page buffers leads to an increase in chip size, which is undesirable.
Innovation Solution
The semiconductor storage device incorporates signal lines that pass through a non-facing region around the memory cell unit, avoiding interference with bit lines and word lines, and utilizing a peripheral circuit for voltage transmission control, thereby maintaining chip size without increasing it.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of row decoders and page buffers is increased to enhance functionality, then the device becomes more multifunctional, but the chip size increases
Solution Approach 1:
The patent utilizes the non-facing region (a previously underutilized spatial dimension) to route signal lines. By routing signal lines through this third dimension rather than expanding in the planar direction, the patent achieves enhanced functionality without increasing chip size in the traditional two-dimensional plane.
Solution Approach 2:
The patent nests signal lines within the non-facing region, effectively placing routing paths inside the existing structural footprint. This nesting approach allows additional functionality to be integrated without requiring external expansion of the chip area.
2Ease of operation
If signal lines are routed through the region between memory cell arrays and peripheral elements, then connectivity is achieved, but signal line interference with bit lines and word lines increases
Solution Approach 1:
The patent extracts signal line routing from the crowded planar region where bit lines and word lines are densely packed. By taking out the signal lines and relocating them to the non-facing region, the patent eliminates the harmful interference that would occur in the congested original routing area.
Solution Approach 2:
The non-facing region serves as an intermediary space that mediates between the memory cell arrays and peripheral elements. This intermediate routing path allows signal lines to connect necessary components without directly intersecting or interfering with the bit lines and word lines in the main operational region.
Data Source
AI summary
A semiconductor storage device includes a memory cell unit which includes memory cell arrays including a plurality of memory cells; a peripheral circuit which performs voltage transmission control including a write operation, a read operation, and an erasing operation with respect to the memory cell unit; and signal lines which connect the peripheral circuit to the memory cell unit, and at least a portion of the signal lines is formed in a non-facing region, the non-facing region being a region where the memory cell unit does not face the peripheral circuit, the non-facing region being in a peripheral region formed around a periphery of the memory cell arrays of the memory cell unit.