Semiconductor Storage Device Staggered Write Protect Programming
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Solution Overview
Problem
In monolithic stacked flash memory devices, inconsistent busy states between master and slave chips can occur, leading to issues like unselected chips being incorrectly reported as ready and increased current consumption when both chips execute write protect commands simultaneously.
Innovation Solution
The semiconductor storage device controls the programming operations of memory chips such that the selected chip's programming time is longer than the unselected chip's, ensuring the unselected chip completes its programming before being reported as ready, and executes write inhibit operations in a manner that avoids simultaneous peak current consumption by staggering programming times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If both master and slave chips execute write protect commands simultaneously, then write protection is established, but peak current consumption increases
Solution Approach 1:
The patent implements a mechanism where the master chip executes the write protect command first, and the slave chip waits until the master chip completes its programming operation before executing its write protect command. This preliminary execution sequence ensures that write protection is ultimately established for both chips, but prevents simultaneous peak current consumption by staggering the programming operations in time.
2Productivity
If unselected chip completes programming quickly, then programming efficiency improves, but busy state monitoring becomes inaccurate
Solution Approach 1:
The patent implements a feedback mechanism where the master chip monitors the busy state of the slave chip through status register readings. The master chip continuously checks whether the slave chip has completed its programming operation and only proceeds with subsequent operations when the slave chip is confirmed to be in the ready state. This feedback loop ensures accurate busy state monitoring while maintaining programming efficiency, as the slave chip can complete its programming quickly without affecting the overall system correctness.
Data Source
AI summary
A semiconductor memory device preventing inconsistent busy states between a plurality of memory chips is provided. A semiconductor memory device includes a master chip and at least one slave chip. The master chip and the slave chip include a status register capable of storing protection information. When a write-protect (WP) commend for locking the protection information of the status register is input, the protection information and lock information are programmed in a memory array. At this time, programming is controlled in a manner that a programming time in a selected memory chip is longer than a programming time in an unselected memory chip.