Semiconductor Storage Device Word Line Voltage Drop Compensation
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Solution Overview
Problem
Resistance-change type semiconductor storage devices face reading errors due to variations in on-currents caused by voltage drops across word lines, leading to inconsistent data retrieval.
Innovation Solution
The connection area between memory cells and word lines is adjusted to compensate for voltage drops, ensuring consistent on-currents by setting the connection area between memory cells farther from the hook-up portion to be n times that of cells closer to the hook-up portion, thereby reducing reading errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are arranged along word lines extending from hook-up portions, then device capacity and integration are improved, but voltage drops across word lines cause variations in on-currents leading to reading errors
Solution Approach 1:
The patent applies local quality by varying the connection area of memory cells based on their position along the word line. Memory cells farther from the hook-up portion have larger connection areas to compensate for voltage drops, while cells closer to the hook-up portion have smaller connection areas. This position-dependent differentiation ensures uniform on-currents across all memory cells despite the voltage gradient along the word line.
2Ease of manufacture
If uniform connection areas are used for all memory cells, then manufacturing simplicity is maintained, but voltage drops cause inconsistent on-currents and reading errors
Solution Approach 1:
The patent implements local quality by making the connection area a function of position along the word line. Specifically, memory cells at different positions have connection areas that are n times larger than those closer to the hook-up portion, where n is a scaling factor. This approach maintains manufacturing feasibility while correcting the voltage drop-induced current variations through geometric adjustment rather than complex circuitry.
3Reliability
If connection area is increased for memory cells farther from hook-up portions, then on-current consistency is improved, but device area and complexity increase
Solution Approach 1:
The patent applies parameter changes by modifying the connection area parameter of memory cells based on their position along the word line. Instead of using uniform connection areas, the patent scales the connection area parameter proportionally with distance from the hook-up portion. This parameter adjustment compensates for voltage drops and achieves on-current consistency while minimizing the increase in overall device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This adjustment improves the reliability of read operations by minimizing the difference in on-currents flowing through memory cells, thereby reducing reading errors and ensuring accurate data retrieval.
Implementation Method 1
The memory film used in this type of the semiconductor storage device changes the resistance value when a voltage is applied across the memory film.
Data Source
AI summary
A semiconductor storage device includes a first wire extending in a first direction from a first end to a second end, a plurality of second wires spaced from each other in the first direction and extending in a second direction intersecting the first direction, and a plurality of memory films spaced from each other along the first wire from the first end to the second end and respectively being between the first wire and a second wire of the plurality of second wires. A first memory film of the plurality is at position along the first wire that is between a position of a second memory film and the first end. A contact area between the second memory film and the first wire is greater than a contact area between the first memory film and the first wire.