Semiconductor Storage Device Voltage Segmentation
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Solution Overview
Problem
Current semiconductor storage devices face challenges in efficiently managing voltage levels during read and write operations, leading to high power consumption and potential transistor damage due to forward bias issues.
Innovation Solution
The semiconductor storage device employs a controller to apply specific voltage polarities and magnitudes to interconnections, using a dummy memory cell configuration to manage voltage differences and prevent forward bias, allowing for reduced voltage magnitudes and efficient operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high voltage magnitudes are applied during read and write operations, then reliable data storage and retrieval are achieved, but power consumption increases and transistor damage risk increases
Solution Approach 1:
The bit line is divided into a first bit line and a second bit line, with the first bit line having a first potential and the second bit line having a second potential different from the first potential. This segmentation allows the memory cell to operate with reduced voltage magnitude while maintaining reliable data storage and retrieval through the potential difference between the segmented bit lines.
2Reliability
If high voltage magnitudes are applied during read and write operations, then reliable data storage and retrieval are achieved, but transistor damage due to forward bias increases
Solution Approach 1:
The bit line is divided into a first bit line and a second bit line, with the first bit line having a first potential and the second bit line having a second potential different from the first potential. This segmentation prevents forward bias issues that could damage transistors while maintaining reliable operation through the potential difference between the segmented bit lines.
Solution Approach 2:
The first variable resistance element is connected between the first bit line and the second bit line, creating a potential difference that enables reliable memory operation without requiring high voltage magnitudes that would cause forward bias and transistor damage.
3Use of energy by moving object
If voltage magnitude is reduced for lower power consumption, then power efficiency improves, but forward bias issues and operation reliability worsen
Solution Approach 1:
The bit line is divided into a first bit line and a second bit line, with the first bit line having a first potential and the second bit line having a second potential different from the first potential. This segmentation enables the memory cell to operate with reduced voltage magnitude while maintaining operation reliability through the potential difference between the segmented bit lines.
Data Source
AI summary
A semiconductor storage device includes interconnections in a first layer and a second layer, a first memory cell between a first and a second interconnection, and a dummy memory cell between the first interconnection and a third interconnection. A controller applies a first voltage of a first polarity to the first interconnection and a second voltage of a second polarity opposite the first polarity to the second interconnection at a first time. The controller applies a third voltage at a second time after the first time to the first interconnection. The third voltage having a smaller magnitude smaller than first voltage. The controller applies a fourth voltage to the third interconnection at the second time. The fourth voltage has a magnitude larger than the third voltage but smaller than the first voltage.