Stress Buffer Structures in 3D Semiconductor Packages
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Solution Overview
Problem
Three-dimensional (3D) semiconductor packages face issues with thermal mismatch and warpage between interposers and circuit boards, leading to cracks and underfill delamination due to coefficients of thermal expansion (CTEs) mismatch and physical stress during thermal cycling.
Innovation Solution
The method involves forming grooves in scribe line regions of a substrate, disposing stress buffer structures in intersection regions, and embedding them in underfill material to buffer stress and prevent crack initiation at recessed corners and edges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If 3D semiconductor packages are used to increase circuit density, then circuit density is improved, but thermal mismatch and warpage between interposers and circuit boards cause cracks and underfill delamination
Solution Approach 1:
The patent introduces grooves that segment the interposer substrate into multiple regions, creating expansion joints that allow independent thermal expansion of different segments. This segmentation prevents continuous stress propagation across the entire interposer, thereby reducing crack formation and delamination while maintaining the 3D package's high circuit density.
Solution Approach 2:
The patent incorporates stress buffer structures and underfill material beforehand to cushion against thermal stress before it causes damage. These structures are pre-positioned to absorb and distribute thermal expansion forces, preventing cracks and delamination from occurring during thermal cycling while preserving the package's structural integrity and high density.
2Reliability
If stress buffer structures are added to mitigate thermal stress, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies stress buffer structures and grooves locally at critical stress concentration points (such as corners and edges of the interposer) rather than uniformly across the entire structure. This localized approach provides necessary stress relief and improves reliability at vulnerable points while minimizing the overall addition of complex structures.
Solution Approach 2:
The patent introduces underfill material as an intermediary substance between the interposer and substrate that mediates thermal stress. This underfill layer acts as a buffer that absorbs expansion forces and distributes stress evenly, reducing the need for additional complex stress management structures while maintaining package integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively mitigates crack and delamination issues by distributing thermal stress, enhancing the reliability and durability of 3D semiconductor packages during thermal cycling.
Implementation Method 1
thermal mismatch and warpage between interposers and circuit boards, leading to cracks and underfill delamination due to coefficients of thermal expansion (CTEs) mismatch and physical stress during thermal cycling
Implementation Method 2
embedding them in underfill material to buffer stress and prevent crack initiation at recessed corners and edges
Data Source
AI summary
A semiconductor package includes a first package component include a first side, a second side opposite to the first side, and a plurality of recessed corners over the first side. The semiconductor package further includes a plurality of first stress buffer structures disposed at the recessed corners, and each of the first stress buffer structures has a curved surface. The semiconductor package further includes a second package component connected to the first package component and a plurality of connectors disposed between the first package component and the second package component. The connectors are electrically coupled the first package component and the second package component. The semiconductor package further includes an underfill material between the first package component and the second package component, and at least a portion of the curved surface of the first stress buffer structures is in contact with and embedded in the underfill material.