Semiconductor Device Stress Relaxation Trenches

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Solution Overview

Problem

High-density element isolating trench structures in semiconductor devices often lead to stress concentration and crack generation due to dense packing, which affects the integrity and functionality of the device.

Innovation Solution

Incorporating a stress relaxation structure between element isolating trenches, such as a corrugated trench pattern or a silicon nitride film, that disperses stress by inclining trenches at specific angles, thereby reducing the likelihood of crack formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If element isolating trenches are arranged at high density, then the integration degree of the semiconductor device is improved, but stress concentration occurs and cracks are generated in adjacent trenches

Engineering Contradiction:
Improveintegration degreeVSAvoidcrack resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A stress relaxation structure is introduced as an intermediary element between adjacent element isolating trenches. This structure acts as a mediator that absorbs and disperses stress, preventing stress transfer between the densely packed trenches and thereby preventing crack generation while maintaining high integration density

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The physical properties of the stress relaxation structure are specifically designed with different characteristics from the element isolating trenches. The stress relaxation structure has controlled depth and width parameters that enable it to change stress distribution patterns, absorbing stress energy and preventing crack propagation in the high-density trench arrangement

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8742537B2Semiconductor device and method of manufacturing the same
Publication Date: 2014.06.03 LAPIS SEMICON CO LTD
  • US8742537B2 patent drawing
  • US8742537B2 patent drawing
  • US8742537B2 patent drawing

AI summary

Disclosed is a semiconductor device including: a semiconductor substrate; first and second element isolating trenches that are formed in one main surface of the semiconductor substrate separately from each other; a first insulating material that is formed within the first element isolating trench; a plurality of first element formation regions that are surrounded by the first element isolating trench; first semiconductor elements that are respectively formed in the first element formation regions; a second insulating material that is formed within the second element isolating trench; a second element formation region that is surrounded by the second element isolating trench; a second semiconductor element that is formed in the second element formation region; and a stress relaxation structure that is formed between the first element isolating trench and the second element isolating trench.