Semiconductor Device Stress Release Layer STI Leakage
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Solution Overview
Problem
Conventional semiconductor devices with Shallow Trench Isolation (STI) techniques accumulate stresses during formation, leading to substrate defects and increased leakage current due to parasitic latch-up effects, which hinder performance improvement.
Innovation Solution
Incorporating a stress release layer made of BSG or BPSG between the substrate and STI, with a liner of oxide and nitride, and performing annealing at temperatures higher than 600°C to relax stresses, thereby reducing leakage current and enhancing device reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If STI is formed to prevent latch-up effect and improve device reliability, then device reliability is improved, but stress accumulates in the substrate causing defects and increased leakage current
Solution Approach 1:
A stress release layer is introduced as an intermediary between the STI and the substrate. This layer acts as a mediator that absorbs and releases the stress generated during STI formation, preventing stress transmission to the substrate while maintaining the electrical isolation function of the STI structure.
Solution Approach 2:
The stress release layer undergoes a parameter change through annealing treatment at temperatures higher than 600°C, which turns the layer viscous and enables it to relax stress. This thermal parameter change transforms the mechanical stress state, allowing the layer to flow and release accumulated stress without compromising the STI structure.
2Object-generated harmful factors
If STI is formed to discontinue parasitic electrical connection, then leakage current is reduced, but stress accumulation causes dislocation defects in the substrate
Solution Approach 1:
The stress release layer serves as a protective intermediary between the STI and substrate, absorbing mechanical stress during STI formation and preventing stress-induced dislocation defects in the substrate, while the STI maintains its function of discontinuing parasitic electrical connections.
Solution Approach 2:
The stress release layer is formed beforehand to cushion and absorb the stress that will be generated during subsequent STI formation processes. This preemptive measure protects the substrate from stress-induced damage before the stress can cause dislocation defects.
3Object-generated harmful factors
If annealing is performed at high temperature to relax stress, then stress is released and leakage current is reduced, but process complexity increases
Solution Approach 1:
The stress release layer undergoes a phase transition during annealing at temperatures higher than 600°C, turning viscous and enabling stress relaxation. This phase change allows the material to flow and release stress effectively, achieving stress relief through a well-understood physical process that can be integrated into existing manufacturing workflows.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stress release layer effectively reduces substrate leakage current and improves device reliability by mitigating stress accumulation during STI formation, preventing defects and enhancing overall performance.
Implementation Method 1
performing an annealing to turn the stress-relieving layer viscous so as to relax stress
Implementation Method 2
performing an annealing at a temperature higher than about 600° C.
Data Source
AI summary
The present invention discloses a semiconductor device, which comprises: a substrate, and a shallow trench isolation in the substrate, characterized in that, the semiconductor device further comprises a stress release layer between the substrate and the shallow trench isolation. In the semiconductor device and the method for manufacturing the same according to the present invention, the stresses accumulated during the formation of the STI can be released by interposing the stress release layer made of a softer material between the substrate and the STI, thereby reducing the leakage current of the substrate of the device and improving the device reliability.