Semiconductor Stressor Formation via Selective Etching

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Solution Overview

Problem

Strain technologies face difficulties in application to certain semiconductor device structures, which hinders the improvement of electrical characteristics in these devices.

Innovation Solution

A method involving the formation of preliminary trenches, etching selection regions, and stressors in the fin active region of semiconductor devices, utilizing anisotropic etching and plasma ion implantation to create specific impurity concentrations and trench geometries, allowing for the formation of a gate structure and stressors that enhance electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If strain technologies are applied to improve electrical characteristics, then device performance is improved, but applicability to certain semiconductor device structures is limited

Engineering Contradiction:
Improveelectrical characteristicsVSAvoidapplicability to device structures
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces etching selection regions with different impurity concentrations in specific locations adjacent to the gate structure. These regions have higher impurity concentrations than the surrounding fin active region, creating local property differences that enable selective etching. This local modification allows strain technology to be applied effectively to specific device structures without requiring complete structural changes throughout the entire device.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the impurity concentration parameter in the etching selection regions to enable selective removal of material. By doping these regions with higher impurity concentrations (e.g., phosphorus or boron), the material properties are altered to facilitate selective etching processes. This parameter change enables the formation of trenches with precise geometries, making strain technology applicable to various semiconductor device structures.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If preliminary trenches and etching selection regions are formed to enable strain application, then electrical characteristics are improved, but manufacturing process complexity increases

Engineering Contradiction:
Improveelectrical characteristicsVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary doping to create etching selection regions with different impurity concentrations before forming the final trench structures. This preliminary action modifies the material properties in advance, enabling subsequent selective etching processes to proceed more easily. By preparing the structure beforehand with differentiated impurity concentrations, the manufacturing process becomes more controllable despite the added initial steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The etching selection regions act as intermediary structures that facilitate the formation of precise trench geometries. These regions with modified impurity concentrations serve as a medium between the initial fin active region and the final trench structure. The intermediary regions enable selective etching by providing a material interface that responds differently to etching processes, thereby simplifying the overall manufacturing control.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the formation of semiconductor devices with improved electrical characteristics by precisely controlling impurity concentrations and trench structures, facilitating better strain application and device performance.

Implementation Method 1

forming etching selection regions in portions of the fin active region that are exposed by the preliminary trenches

Methodology Applied
Scientific EffectIon Implantation: Ion Implantation

Implementation Method 2

forming preliminary trenches by anisotropically etching the fin active region

Methodology Applied
Scientific EffectAnisotropic Etching:

Data Source

PatentUS9240460B2Methods of forming semiconductor devices including an embedded stressor, and related apparatuses
Publication Date: 2016.01.19 SAMSUNG ELECTRONICS CO LTD
  • US9240460B2 patent drawing
  • US9240460B2 patent drawing
  • US9240460B2 patent drawing

AI summary

Methods of forming semiconductor devices are provided. A method of forming a semiconductor device includes forming preliminary trenches adjacent opposing sides of an active region. The method includes forming etching selection regions in portions of the active region that are exposed after forming the preliminary trenches. The method includes forming trenches by removing the etching selection regions. Moreover, the method includes forming a stressor in the trenches. Related apparatuses are also provided.