Semiconductor Stressor Structure for Carrier Mobility
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Solution Overview
Problem
The semiconductor industry faces challenges in forming reliable semiconductor devices at increasingly smaller sizes due to the complexity and difficulty of fabrication processes as feature sizes decrease, affecting production efficiency and cost.
Innovation Solution
The process involves forming a semiconductor device structure with a stressor structure under a channel structure, wrapped by a gate stack, where the semiconductor layer is transformed into a stressor structure to induce epitaxial structures and apply stress, improving carrier mobility and device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency and cost are improved, but fabrication process complexity and difficulty increase
Solution Approach 1:
The patent transforms the base layer into a stressor structure by changing its physical and chemical parameters through thermal processing and oxidation, creating a structure with different stress properties that can be applied to the channel structure. This parameter transformation allows the same material layer to serve multiple functions at different stages of fabrication.
Solution Approach 2:
The base layer serves multiple functions: it acts as a structural support layer during fabrication, is transformed into a stressor structure to apply stress to the channel, and ultimately becomes an integral part of the device architecture. This multi-functionality reduces the need for additional separate structures and simplifies the overall fabrication process.
2Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency and cost are improved, but manufacturing reliability deteriorates
Solution Approach 1:
The stressor structure is formed from the base layer before the channel structure is fully assembled, allowing the stress field to be pre-established in the correct orientation and magnitude. This preliminary action ensures that when the channel structure is formed, the desired stress conditions are already in place, improving manufacturing reliability.
Solution Approach 2:
Through thermal oxidation and annealing processes, the base layer's physical and chemical parameters are changed to create a stressor structure with controlled stress properties. This parameter transformation allows precise control over the stress applied to the channel, ensuring reliable device performance despite scaling.
3Reliability
If stressor structure is formed by transforming base layer, then carrier mobility is improved, but additional processing steps are required
Solution Approach 1:
The base layer is given multiple functions: it provides structural support during fabrication and is subsequently transformed into the stressor structure. This eliminates the need for a separate stressor layer, as the base layer itself is converted to serve the stress application function, thereby not increasing overall processing complexity.
Solution Approach 2:
The formation of the stressor structure is merged with existing thermal processing steps in the fabrication sequence. By combining the stressor creation with standard thermal annealing and oxidation processes already required for other device components, additional processing steps are minimized.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance and reliability of semiconductor devices by increasing electron carrier mobility and improving the semiconductor device structure's overall efficiency and manufacturing feasibility.
Implementation Method 1
transforming a semiconductor layer into a stressor structure
Data Source
AI summary
A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes multiple semiconductor nanostructures over a substrate and two epitaxial structures over the substrate. Each of the semiconductor nanostructures is between the epitaxial structures. The semiconductor device structure also includes a gate stack wrapping around the semiconductor nanostructures. The semiconductor device structure further includes a stressor structure between the gate stack and the substrate. The epitaxial structures extend exceeding a top surface of the stressor structure.