Semiconductor Sub-Surface Trench Charge Compensation Structure
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Solution Overview
Problem
High voltage power switching devices face challenges in achieving a balance between low on-state resistance (Rdson) and high breakdown voltage (BVdss), and require significant input charge for switching, which burdens peripheral control circuitry.
Innovation Solution
A semiconductor device with a superjunction structure featuring sub-surface charge compensation trenches and a control gate structure, where p-type and n-type layers are used to balance charge and reduce intermixing, allowing for efficient current flow and high breakdown voltage, while minimizing the need for input charge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional heavily-doped diffused n-type and p-type regions are used in superjunction devices, then on-state resistance is lowered, but manufacturing precision and device reliability deteriorate due to dopant intermixing
Solution Approach 1:
The device structure is segmented into distinct regions: superjunction regions with alternating n-type and p-type layers, and adjacent charge compensation regions with opposite polarity. This segmentation prevents dopant intermixing between the superjunction and compensation regions while maintaining their respective functions. The physical separation through trench structures ensures that heavily-doped regions can be formed without compromising manufacturing precision.
Solution Approach 2:
Intrinsic or lightly-doped semiconductor layers are introduced as intermediary layers between the heavily-doped n-type and p-type regions. These intermediary layers act as barriers that prevent dopant diffusion and intermixing during thermal processing, thereby maintaining manufacturing precision while allowing the heavily-doped regions to provide low on-state resistance.
2Reliability
If high breakdown voltage is achieved through conventional structures, then voltage support capability is improved, but on-state resistance increases
Solution Approach 1:
Different regions of the device are assigned different doping characteristics: the superjunction regions contain heavily-doped n-type and p-type layers for low on-state resistance, while the charge compensation regions contain oppositely-doped layers for high breakdown voltage. This local differentiation of doping quality allows simultaneous optimization of both on-state resistance and breakdown voltage without the trade-off present in conventional uniform structures.
Solution Approach 2:
The device employs a composite structure combining superjunction regions with charge compensation regions. This composite architecture integrates two functional systems: the superjunction portion provides low resistance current paths, while the compensation portions provide high voltage blocking capability. The combination achieves both low on-state resistance and high breakdown voltage that neither region could achieve alone.
3Ease of operation
If large input charge is used for switching, then switching capability is improved, but peripheral control circuitry complexity increases
Solution Approach 1:
The charge compensation regions are designed to automatically compensate for charge imbalances during switching operations. The oppositely-doped layers in the compensation regions provide inherent charge balancing that reduces the external charge required for switching. This self-compensating mechanism reduces the burden on peripheral control circuitry while maintaining effective switching capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves lower Rdson, higher BVdss, and reduced input charge requirements, enhancing the performance and efficiency of high voltage power switching.
Implementation Method 1
the heavily doped n-type and p-type regions deplete into or compensate each other to provide a high BVdss
Implementation Method 2
current flows through the heavily doped n-type regions, which lowers Rdson
Data Source
AI summary
In one embodiment, a semiconductor device is formed having sub-surface charge compensation regions in proximity to channel regions of the device. The charge compensation trenches comprise at least two opposite conductivity type semiconductor layers. A channel connecting region electrically couples the channel region to one of the at least two opposite conductivity type semiconductor layers.