Parallel Semiconductor Submodule Conductor Bonding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor devices face challenges in improving yield and reliability when multiple semiconductor elements are arranged in parallel, particularly in high-output power converters where size and weight reduction are critical.
Innovation Solution
The semiconductor device comprises submodules with semiconductor elements sandwiched between conductors and lead wires, with additional conductors covering and bonding the outer conductors to prevent overlap and facilitate easier connections, reducing signal transmission differences and heat concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple semiconductor elements are arranged in parallel to increase output, then the power converter can handle larger currents, but the complexity of connection and signal transmission increases
Solution Approach 1:
Multiple conductor members are bundled together and covered by a single outer sheath or common structure, merging multiple separate connections into a unified assembly. This reduces the complexity of handling and connecting multiple individual conductor members while maintaining the parallel configuration of semiconductor elements for high current capacity.
Solution Approach 2:
The outer conductor or common sheath serves multiple functions simultaneously: it provides electrical connection, mechanical support, insulation, and structural protection for the bundled conductor members. This multi-functionality simplifies the overall connection structure while enabling parallel semiconductor element arrangement for increased power output.
2Volume of moving object
If conductor members are positioned close to semiconductor elements for compact design, then size is reduced, but short circuit risk increases
Solution Approach 1:
An outer sheath or insulating layer is introduced as an intermediary between the conductor members and semiconductor elements. This intermediary provides electrical insulation and mechanical protection, allowing conductor members to be positioned close to semiconductor elements for compact design while preventing short circuits through the insulating barrier.
Solution Approach 2:
Conductor members are nested within a common outer sheath or protective structure that provides insulation and protection. This nested configuration allows compact arrangement of multiple conductor members near semiconductor elements while the outer layer maintains electrical isolation and prevents short circuits.
3Volume of moving object
If lead wires are routed close to conductor members for compact layout, then device size is reduced, but signal interference increases
Solution Approach 1:
The outer sheath or insulating structure serves as an intermediary that electrically isolates lead wires from conductor members. This allows compact routing of lead wires near conductor members for reduced device size while the intermediary layer prevents electromagnetic interference and maintains signal transmission quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances yield and reliability by improving connection processes, reducing signal transmission disparities, and dispersing heat, thereby increasing the reliability and efficiency of parallel semiconductor element arrangements.
Implementation Method 1
a fifth conductor which is formed to cover the first conductor and the third conductor and is bonded to the first conductor and the third conductor
Implementation Method 2
a sixth conductor which is formed to cover the second conductor and the fourth conductor and is bonded to the second conductor and the fourth conductor
Implementation Method 3
a first lead wire which transmits a control signal of the first semiconductor element
Data Source
AI summary
To improve yield and reliability at the time when a plurality of semiconductor elements used for a semiconductor device is arranged in parallel. A semiconductor device according to the present invention includes a first submodule which includes a first semiconductor element sandwiched between a first conductor and a second conductor and a first lead wire which transmits a control signal of the first semiconductor element, a second submodule which includes a second semiconductor element sandwiched between a third conductor and a fourth conductor and a second lead wire which transmits a control signal of the second semiconductor element, a fifth conductor which is formed to cover the first conductor and the third conductor and is bonded to the first conductor and the third conductor, and a sixth conductor which is formed to cover the second conductor and the fourth conductor and is bonded to the second conductor and the fourth conductor, in which the first conductor is formed so as not to overlap with a part of the first lead wire facing a first connection portion to be connected to the second lead wire.