Semiconductor Substrate Dummy Metal Density Analysis
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Solution Overview
Problem
The analysis of high-frequency semiconductor circuits with dummy metal pieces becomes increasingly difficult due to the need for finer mesh sizes and higher metal density, leading to significant calculation resource requirements and deviations between design and actual values, especially when process rules are stringent and materials like dummy metal and dielectric are mixed.
Innovation Solution
The approach involves setting the size of dummy metal pieces inside high-frequency circuit lines to be n times larger, with corresponding increases in interval and a reduction in number to 1/n2, where n is a real number greater than one, to maintain metal density and satisfy process rules, thereby facilitating analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dummy metal pieces are arranged densely to satisfy metal density requirements in finer processes, then manufacturing precision is improved, but device complexity increases due to enormous mesh number increase
Solution Approach 1:
The patent divides the semiconductor substrate into multiple analysis regions (first region containing high-frequency circuits, second region adjacent to first region, third region outside peripheral area). Different dummy metal piece arrangements are applied to each region, allowing selective analysis rather than analyzing the entire substrate uniformly. This segmentation reduces the overall mesh number while maintaining manufacturing precision in critical areas.
Solution Approach 2:
The patent applies different dummy metal piece configurations to different regions: in the first region, dummy metal pieces are arranged with specific intervals and sizes to satisfy metal density requirements near high-frequency circuits, while in the third region outside the peripheral area, fewer or no dummy metal pieces are used. This local differentiation maintains manufacturing precision where needed while reducing overall device complexity.
2Measurement precision
If electromagnetic field analysis is performed with high mesh number for accurate analysis, then measurement precision is improved, but loss of time increases due to significant calculation resources required
Solution Approach 1:
The patent extracts only the necessary regions for analysis by defining analysis regions that exclude areas outside the peripheral area of the semiconductor substrate. By performing electromagnetic field analysis only on the first, second, and third regions rather than the entire substrate, the mesh number is significantly reduced while maintaining analysis accuracy for critical high-frequency circuit areas, thereby reducing calculation time.
Solution Approach 2:
The patent applies partial analysis by focusing electromagnetic field analysis on specific regions containing high-frequency circuits and their peripheral areas, rather than analyzing the entire substrate. This partial action approach maintains measurement precision for critical circuits while reducing the overall calculation time and resources required.
3Reliability
If dummy metal pieces are manually arranged distant from desired circuits to prevent circuit effects, then reliability is improved, but device complexity increases due to large number of dummy metal pieces requiring analysis
Solution Approach 1:
The patent manages the spatial arrangement of dummy metal pieces by considering both their distance from high-frequency circuits and their distribution pattern. Dummy metal pieces are positioned in the second region (adjacent to first region) and third region (outside peripheral area) with specific interval relationships, creating a dimensional arrangement that maintains circuit reliability while reducing the total number of pieces requiring analysis through the regional analysis approach.
Data Source
AI summary
A semiconductor substrate according to the present disclosure includes a high-frequency circuit, in which a size of each of dummy metal pieces and an interval of an arrangement of the dummy metal pieces constituting a dummy metal piece group in a first area which is inside a line constituting a high-frequency circuit is n times larger than that of a dummy metal piece group outside a peripheral area of the high-frequency circuit; and the number of the dummy metal pieces in the first area is 1/n2 of the number of the dummy metal pieces outside the peripheral area, where n is a real number greater than one.